Fujitsu FR81S User Manual
CHAPTER 11: I/O PORTS
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : I/O PORTS
FUJITSU SEMICONDUCTOR CONFIDENTIAL
52
5.1.3. Peripheral Output Assignment
The peripheral output assignment is shown below.
The setting method is the same as that described in "5.1.1 Peripheral I/O (bidirectional) Pin Assignment".
Preparation
⋅
Since the pin will once function as a port as the result of step (1), set the DDR and PDR values in
advance if necessary.
⋅
For a pin with the AD converter function, set the applicable bit in the analog input enable register
(ADER) of the AD converter to "Port I/O mode". For information on the setting method, see
"CHAPTER: A/D CONVERTER".
(1)Set the PFR of the applicable pin to enable the port function.
(2)Disable the EPFRs for all other peripherals to be used by the relevant pin.
(3)If the relevant pin is also used for the external bus or the relevant peripheral is one of the targets of I/O
multiplexing, set the EPFR of the relevant peripheral. In addition, if the relevant peripheral has the I/O
relocation function, set the EPFR of the relevant peripheral.
(4)Set the PFR for the peripheral.
Figure 5-4 Peripheral Output Assignment Procedure
EPFR
PFR
Peripheral
output value
External bus
Output value
PDR
DDR
PDDR
EPFR
Peripheral I/O
direction control
External bus I/O
direction control
To peripheral
input value
To input I/O relocation selection circuit
Input I/O relocation selection circuit
To external bus input value
Input value from each pins
To peripheral input value
Pin
(1)
(2)
(3)
(4)
MB91520 Series
MN705-00010-1v0-E
447