Fujitsu FR81S User Manual
CHAPTER 16: INTERRUPT REQUEST BATCH READ
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : INTERRUPT REQUEST BATCH READ
FUJITSU SEMICONDUCTOR CONFIDENTIAL
8
4.1. Interrupt Request Batch Read Register 0 upper-order :
IRPR0H (Interrupt Request Peripheral Read register
0H)
0H)
The bit configuration of the interrupt request batch read register 0 upper-order is explained.
This register indicates the peripheral that has issued the interrupt request. (Interrupt vector number #18)
IRPR0H : Address 0418
H
(Access : Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
RTIR0
RTIR1
Reserved
Initial value
0
0
0
0
0
0
0
0
Attribute R,WX
R,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
[bit7] RTIR0 (Reload Timer Interrupt Request 0) : Reload Timer 0 Interrupt Request
[bit6] RTIR1 (Reload Timer Interrupt Request 1) : Reload Timer 1 Interrupt Request
[bit6] RTIR1 (Reload Timer Interrupt Request 1) : Reload Timer 1 Interrupt Request
Read value of each bit
Meaning
0
No interrupt request has been issued.
1
An interrupt request has been issued.
MB91520 Series
MN705-00010-1v0-E
511