Fujitsu FR81S User Manual
CHAPTER 16: INTERRUPT REQUEST BATCH READ
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : INTERRUPT REQUEST BATCH READ
FUJITSU SEMICONDUCTOR CONFIDENTIAL
27
4.20. Interrupt Request Batch Read Register 10
lower-order : IRPR10L (Interrupt Request Peripheral
Read register 10L)
Read register 10L)
The bit configuration of the interrupt request batch read register 10 lower-order is explained.
This register indicates the peripheral that has issued the interrupt request. (Interrupt vector number #55)
IRPR10L : Address 042D
H
(Access : Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved
ICUIR9
Reserved
Initial value
0
0
0
0
0
0
0
0
Attribute R0,WX
R,WX
R0,WX R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
[bit6] ICUIR9 (ICU Interrupt Request 9) : Input Capture ch.9 Interrupt Request
Read value of each bit
Meaning
0
No interrupt request has been issued.
1
An interrupt request has been issued.
MB91520 Series
MN705-00010-1v0-E
530