Fujitsu FR81S User Manual
CHAPTER 1: OVERVIEW
4. Function overview
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : OVERVIEW
FUJITSU SEMICONDUCTOR CONFIDENTIAL
21
4. Function overview
This section shows function overview of MB91520 series.
Table 4-1 : Function overview
Function
Features
CPU
32-bit RISC microcontroller FR81S CPU core
Built-in memory protection function (MPU) 8 channels
Built-in floating-point operation (FPU)
Clock
Main oscillation : 4MHz (Up to 16MHz can be input)
Sub oscillation : 32kHz or 100kHz or None
PLL multiplication rate: Up to 20 times of multiplication
Built-in 100kHz CR oscillator
I/O ports
Each bit can be programmed for I/O or peripheral signals
Pull-up can be set.
External bus Interface
22-bit address, 8/16-bit Data output
Internal bus interface
On chip bus : 32-bit, maximum operating frequency : 80MHz
Peripheral bus interface
Maximum operating frequency : 40MHz
32-bit peripheral bus, or 16-bit peripheral bus (R-bus)
* Both of them operate in the same frequency.
Flash interface
Wild register function provided.
For small sector (64KB)
DMA controller
Up to 16 channels can be started simultaneously.
The transfer cause (internal peripheral request or software) is selectable.
Burst or block transfer mode is selectable.
- When two or more interrupts are in one interrupt vector, it can select from which
interrupt to generate the DMA demand.
- When two or more interrupts are in one interrupt vector, the interrupt cleared at the
DMA transfer completion can be selected.
Base timer
16-bit timer (MB91F52xD, MB91F52xF, MB91F52xJ, MB91F52xK, MB91F52xL)
Any of four PWM/PPG/PWC/reload timer functions can be selected and used.
A 32-bit timer can be used in 2 channels of cascade mode for the reload timer/PWC
function.
Free-run timer
16-bit/32-bit up counter
Free-run timer ch.0 to ch.2 : 16-bit
Free-run timer ch.3 to ch.5 : 32-bit
MB91520 Series
MN705-00010-1v0-E
20