Fujitsu FR81S User Manual
CHAPTER 19: BASE TIMER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
19
[PPG]
MDSE
Description
0
Reload mode: A sequence of "L"-level and "H"-level signals (consecutive pulses) is
output.
1
One-shot mode: A string of one "L"-level signal and one "H"-level signal (single
pulses) is output.
[PWC]
MDSE
Description
0
Continuous measurement mode: In this mode, after one sequence of measurement is
conducted, the input of the next measurement start
edge is awaited and the detection of the next
measurement start edge triggers another sequence
of measurement.
1
Single measurement mode: In this mode, measurement is conducted only once.
[bit1] CTEN (CounT ENable) : Counter operation enable bit
Enables/disables the counter operation.
CTEN
Description
0
Disables/stops the operation.
1
Enables the operation.
[bit0] STRG (Software TRiGger) : Software trigger bit
Functions as a trigger for timer activation, etc.
Notes:
⋅
When writing to this bit, be careful not to clear other bits.
⋅
When writing to CTEN and FMD[2:0] simultaneously, issue a trigger as soon as the operation is
enabled.
STRG
Description
0
Ignores.
1
Issues a trigger.
MB91520 Series
MN705-00010-1v0-E
652