Fujitsu FR81S User Manual
CHAPTER 19: BASE TIMER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
20
4.1.3. I/O Selection Register : BTSEL01 (Base Timer SElect
register ch.0 and ch.1)
The bit configuration of the I/O selection register (BTSEL01) is shown below.
These bits are used to set the I/O mode of ch.0 and ch.1 for the base timer.
Notes:
⋅
These registers must be accessed in 8-bit mode.
⋅
These registers will not be initialized even if reset mode is set (writing of BTxTMCR:FMD = 000).
BTSEL01 : Address 009C
H
(Access: Byte)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved
SEL01[3:0]
Initial value
1
1
1
1
0
0
0
0
Attribute R1,WX R1,WX R1,WX R1,WX
R/W
R/W
R/W
R/W
[bit3 to bit0] SEL01[3:0] (SELect) : ch.0/ch.1 I/O selection bits
These bits are used to set the I/O mode of ch.0 and ch.1 for the base timer.
SEL01[3:0]
Description
0000
I/O mode 0
(16-bit timer standard mode)
0001
I/O mode 1
(32-bit timer full mode)
0010
I/O mode 2
(External trigger sharing mode)
0011
Setting is prohibited
0100
I/O mode 4
(Timer activation/stop mode)
0101
I/O mode 5
(Simultaneous software activation mode)
0110
I/O mode 6
(Software activation timer activation/stop mode)
0111
I/O mode 7
(Timer activation mode)
1xxx
Setting is prohibited
MB91520 Series
MN705-00010-1v0-E
653