Fujitsu FR81S User Manual
CHAPTER 19: BASE TIMER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
33
4.4.3. H Width Setting Registers 0, 1 : BTxPRLH (Base
Timer 0/1 Pulse Length of "H" register)
The bit configuration of H width setting registers 0, 1 (BTxPRLH) is shown below.
These registers with a buffer set the width of signal level output when the base timer x L width setting reload
register (BTxPRLL) completes counting values.
Notes:
⋅
These registers must be accessed in 16-bit mode.
⋅
Set these registers after selecting a base timer function to the PPG timer using the FMD2 to FMD0 bits
of the timer control register (BTxTMCR).
⋅
These registers will also be initialized when reset mode is set (writing of BTxTMCR:FMD = 000).
BTxPRLH : Address Base_addr + 0A
H
(Access: Half-word)
bit15
bit14
- - -
bit2
bit1
bit0
D[15:0]
Initial value
0
0
- - -
0
0
0
Attribute R/W
R/W
- - -
R/W
R/W
R/W
[bit15 to bit0] D[15:0] (Data) : Data bits
These registers with a buffer set the width of signal level output when the L width setting reload register
(BTxPRLL) completes counting values. When the 16-bit down counter completes counting down the value
set to these registers, the signal level of the output waveform (TOUT) will be inverted.
Setting these registers and the base timer x L width setting reload register (BTxPRLL) determines the widths
of "L" level and "H" level for the output signal. The signal level width set to these registers depends on the
setting of the OSEL bit of the base timer x timer control register (BTxTMCR) as follows:
⋅
OSEL = 0: "H" level width
⋅
OSEL = 1: "L" level width
These registers have a buffer and thus can be rewritten during counting. These registers transfer values at the
following timing.
⋅
Transfer to the buffer
⋅
When a 16-bit PPG timer activation trigger is detected
⋅
When the base timer x H width setting reload register (BTxPRLH) completes counting down values
and underflows
⋅
Transfer to the 16-bit down counter
⋅
When counting down from the value of the base timer x L width setting reload register (BTxPRLL) is
completed.
For rewriting timing, see " Write Timing" in "5.6.3 Operation in Reload Mode".
MB91520 Series
MN705-00010-1v0-E
666