Fujitsu FR81S User Manual
CHAPTER 19: BASE TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
59
5.5. 16-bit PWM Timer Operation
This section explains the 16-bit PWM timer operation.
This section explains the operation performed when the base timer included in this series is used as the 16-bit
PWM timer. An example is also given to set various operation conditions.
Figure 5-12 Block Diagram (16-bit PWM Timer Operation)
CKS
PCLK
EGS
2
3
2
0
2
7
2
8
STRG CTEN
CTEN
MDSE
16
OSEL
UDIE
TGIE
DTIE
16
16
PMSK
BTxPDU T
IRQ0
IRQ1
Edge
BTxPCSR: Base timer x cycle setting register (BTxPCSR)
BTxPDUT: Base timer x duty setting register (BTxPDUT)
Load
Writing
Buffer
Peripheral clock
Buffer
Invert control
Match detection
Division
Edge
Load
Count clock
Waveform output
(TOUT signal)
External clock
(ECK signal)
16-bit
Toggle
Underflow
Count
Underflow/duty
Interrupt
External activation trigger
(TGIN signal)
Trigger
Trigger interrupt request
Timer enabled
BTxPDU T
BTxPCSR
Count
enabled
enabled
Down counter
generation
circuit
detection
detection
request
match interrupt
source
generation
MB91520 Series
MN705-00010-1v0-E
692