Fujitsu FR81S User Manual
CHAPTER 19: BASE TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
69
5.6. 16-bit PPG Timer Operation
This section explains the 16-bit PPG timer operation.
This section explains the operation performed when the base timer included in this series is used as the 16-bit
PPG timer. Examples of procedures for setting various operating conditions are also provided.
Figure 5-17 Block Diagram (16-bit PPG Timer Operation)
BTxPRLL
CKS
PCLK
EGS
2
3
2
0
2
7
2
8
STR G CTE N
CTE N
MDSE
16
BTC T
OSEL
UDIE
TGIE
PPG output
BTxPRLH
PMS K
IRQ0
IRQ1
BTxPRLL : Base timer x L width setting reload (BTxPRLL)
BTxPRLH : Base timer x H width setting reload (BTxPRLH)
BTxTMR : Base timer x timer register (BTxTMR)
Buffer
Trigger interrupt request
Invert control
Toggle
Interrupt
Load
Count clock
Count
Count
Underflow
Down counter
Division
Edge
Edge
Peripheral clock
External clock
(ECK signal)
External activation trigger
(TGIN signal)
Trigger
Timer enabled
Reload data setting
Underflow
(TOUT signal)
detection
enabled
detection
circuit
generation
source
generation
enabled
interrupt request
MB91520 Series
MN705-00010-1v0-E
702