Fujitsu FR81S User Manual
CHAPTER 19: BASE TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
81
5.7. 16/32-bit PWC Timer Operation
This section explains the 16/32-bit PWC timer operation.
This section explains the operation performed when the base timer included in this series is used as the
16/32-bit PWC timer. Examples of procedures for setting various operating conditions are also provided.
Figure 5-23 Block Diagram (16-bit PWC Timer Operation)
BTxDTBF
16-bit mode
T32=0
CKS
Peripheral
clock
(PCLK)
Waveform to
be measured
(TIN signal)
Edge
detection
Edge
detection
Division
circuit
Count
clock
Count
enable
Count
enable
Activation
detection
Stop detection
Up counter
Clear
Overflow
Overflow
interrupt request
Measurement
completion
interrupt request
Interrupt
factor
generation
EGS
3
3
20
27
28
28
MDSE
CTEN
CTEN
MDSE
16
T32
OVIE
EDIE
IRQ0
IRQ1
BTxDTBF :
Base timer x data buffer register
(BTxDTBF)
IRQ 0
IRQ 1
MB91520 Series
MN705-00010-1v0-E
714