Fujitsu FR81S User Manual

CHAPTER 20: RELOAD TIMER

5. Operation

FUJITSU SEMICONDUCTOR LIMITED

CHAPTER : RELOAD TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL

Figure 5-17 Compare Reload Operation (2 / 2)

When the register relation is as described above, 1 count up after loading to the timer makes

TMR become smaller than TMRLRB. Thus the TOUT output is the L level for 1 down count

and then the H level until an underflow occurs. When an underflow occurs, the timer will

reload from TMRLRA and continue counting operation. The TOUT output will remain to be

the L level. (For OUTL=0)

When the register relation is as described above, the TOUT output is the L level between down

count start and an underflow occurrence after loading to the timer because TMR will not become

bigger than TMRLRB. The level will remain to be L even when an underflow occurs.

TMRLRA

TMRLRA+1

TMRLRB

TMRLRA

TMRLRA+1

TMRLRA

TOUT

Count clock

Underflow

Down count from

Underflow

UF bit

EF bit

Activation trigger

1 count

• Sets TMRLRB = TMRLRA

Compare reload function (TMRLRB = TMRLRA) trigger input

• Sets TMRLRB = 0

Compare reload function (TMRLRB = "0") trigger input

reloaded by timer

(for OUTL=0)

comparison match

reloaded by timer

(for OUTL=0)

MB91520 Series

MN705-00010-1v0-E

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