Fujitsu FR81S User Manual
CHAPTER 22: 32-BIT OUTPUT COMPARE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 32-BIT OUTPUT COMPARE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
11
[bit1] CST : Operation enable (Output compare y)
[bit0] CST : Operation enable (Output compare x)
CST
Operation
0
Operation of the output compares is stopped.
1
Operation of the output compares is enabled.
⋅
This bit enables the compare operation for the count value of free-run timer (TCDT) and the output
compare compare register.
⋅
The compare registers (OCCP) must be set with values before the compare operation is enabled
⋅
Because the output compare is synchronized with the free-run timer, when the free-run timer is stopped,
the output compare operation also is stopped.
MB91520 Series
MN705-00010-1v0-E
848