Fujitsu FR81S User Manual
CHAPTER 22: 32-BIT OUTPUT COMPARE
8. Sample Program
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 32-BIT OUTPUT COMPARE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
37
8. Sample Program
This section explains a sample program.
Configuration procedure example 1
.2 channels independent output
Compare operation (7FFF, BFFF)
Interrupt occurrence compare no clear
1. Initial setting
- Free-run timer ch.4 control Register name.bit name
.2 channels independent output
Compare operation (7FFF, BFFF)
Interrupt occurrence compare no clear
1. Initial setting
- Free-run timer ch.4 control Register name.bit name
Setting of control register
Clock selection>>
Compare interrupt request flag>>
Compare interrupt request
enable>>
Counting Operation>>
TCDT clear>>
Count clock>>
Clock selection>>
Compare interrupt request flag>>
Compare interrupt request
enable>>
Counting Operation>>
TCDT clear>>
Count clock>>
TCCSH4,TCCSL4
.ECKE
.ICLR
.ICRE
.STOP
.SCLR
.CLK3-0
.ECKE
.ICLR
.ICRE
.STOP
.SCLR
.CLK3-0
Setting of the timer data value
TCDT4
- Port Register name.bit name
Port OCU6 output setting
See "CHAPTER: I/O
PORTS"
PORTS"
Port OCU7 output setting
- Output compare control Register name.bit name
Free-run timer selection
Setting of control register
Pin output level invert operation>>
Pin output level specification>>
Interrupt request flag>>
Interrupt request enable>>
Operation enable setting>>
Setting of control register
Pin output level invert operation>>
Pin output level specification>>
Interrupt request flag>>
Interrupt request enable>>
Operation enable setting>>
OCFS67
OCSH67,OCSL67
.CMOD
.OTD7,OTD6
.IOP7,IOP6
.IOE7,IOE6
.CST7,CST6
OCSH67,OCSL67
.CMOD
.OTD7,OTD6
.IOP7,IOP6
.IOE7,IOE6
.CST7,CST6
Setting of compare value ch.6
Setting of compare value ch.7
Setting of compare value ch.7
OCCP6
OCCP7
OCCP7
- Interrupt relation Register name.bit name
Setting of an interrupt level.
ICR42
ICR43
ICR43
Setting of I flag
(CCR)
2. Activation
- Output compare activation Register name.bit name
Interrupt control
OCSL67.IOE7
Compare operation activation
OCSL67.CST7
OCSL67.CST6
OCSL67.CST6
- Free-run timer ch.4 activation Register name.bit name
Counting operation activation
TCCSL4.STOP
3. Interrupt
- Interrupt process Register name.bit name
Clearing of interrupt request flag
OCSL67.IOP6
(any process)
......
Clearing of interrupt request flag
OCSL67.IOP7
(any process)
......
4. Interrupt vector
- Setting of the vector table
Note:
Clock-related setting and setting of __set_il(numerical value) in advance
are required. See “CHAPTER: CLOCK” and “CHAPTER: INTERRUPT
CONTROL (INTERRUPT CONTROLLER)”.
are required. See “CHAPTER: CLOCK” and “CHAPTER: INTERRUPT
CONTROL (INTERRUPT CONTROLLER)”.
Program example 1
void OUTPUT67_sample(void)
{
void OUTPUT67_sample(void)
{
freerun4_initial();
OUTPUT67_initial();
OUTPUT67_start();
freerun4_start();
OUTPUT67_initial();
OUTPUT67_start();
freerun4_start();
}
void freerun4_initial(void)
{
void freerun4_initial(void)
{
IO_TCCS4.word = 0x0041;
/* Setting value =0000_0000_0100_0001 */
/* bit15 = 0 ECKE internal clock source */
/* bit14 -10 =0 Reserved Bit */
/* bit9 = 0 ICLR interrupt flag clear */
/* bit8 = 0 ICLR interrupt disable */
/* bit7 = 0 Reserved Bit */
/* bit6 = 1 STOP Counting disable */
/* bit5 = 0 Reserved Bit */
/* bit4 = 0 SCLR free-run timer value (no) initialization */
/* bit3-0 = 0001 CLK3-0
count clock PCLK/2=32MHz/2 */
IO_TCDT4 = 0x0000;
/* timer data value initialization */
}
void OUTPUT67_initial(void)
{
void OUTPUT67_initial(void)
{
PORT_SETTING_OCU6_OUT(); /* Set the OCU6 pin for peripheral input. */
PORT_SETTING_OCU7_OUT(); /* Set the OCU7 pin for peripheral input. */
IO_OCFS67.hword = 0x0003;
PORT_SETTING_OCU7_OUT(); /* Set the OCU7 pin for peripheral input. */
IO_OCFS67.hword = 0x0003;
/* Select the free-run timer 4. */
IO_OCS67.hword = 0xEC0C;
/* Setting value =1110_1100_0000_1100 */
/* bit15-13 = 111 Undefined bit*/
/* bit12 = 0 CMOD ch.6, ch.7 level invert */
/* bit11-10 = 11 Undefined bit*/
/* bit9-8 = 00 OTD7,OTD6 Compare pin output L */
/* bit7-6 = 00 IOP7,IOP6 Output compare no match */
/* bit5-4 = 00 IOE7,IOE6 Output compare interrupt disable */
/* bit3-2 = 11 Undefined bit*/
/* bit1-0 = 00 CST7,CST6 Compare operation disable */
IO_OCCP0 = BFFF
/* Setting of compare register ch.6 */
IO_OCCP1 = 7FFF
/* Setting of compare register ch.7 */
IO_ICR[42].byte = 0x10;
/* Output compare ch.6 interrupt level setting (any value) */
IO_ICR[43].byte = 0x10;
/* Output compare ch.7 interrupt level setting (any value) */
__EI();
/* Interrupt enable */
}
void OUTPUT67_start(void)
{
void OUTPUT67_start(void)
{
IO_OCS67.hword = 0xEC3C; /* bit5-4 = 11 IOE7,IOE6 Output compare interrupt enable */
IO_OCS67.hword = 0xEC3F;
IO_OCS67.hword = 0xEC3F;
/* bit1-0 = 11 CST7,CST6 Compare operation enable */
}
void freerun4_start(void)
{
void freerun4_start(void)
{
IO_TCCSL4.bit.STOP = 0;
/* bit4 = 0 STOP Counting enable */
}
__interrupt void INPUT0_int(void)
{
__interrupt void INPUT0_int(void)
{
IO_OCSL67.byte & = 0xBF;
/* bit6 = 0 IOP6 Clearing of interrupt flag */
……
}
__interrupt void INPUT0_int(void)
{
__interrupt void INPUT0_int(void)
{
IO_OCSL67.byte & = 0x7F;
/* bit7 = 0 IOP7 Clearing of interrupt flag */
……
}
Interrupt routine specification with the vector table is required.
#pragma intvect OUTPUT6_int 58
#pragma intvect OUTPUT7_int 59
Interrupt routine specification with the vector table is required.
#pragma intvect OUTPUT6_int 58
#pragma intvect OUTPUT7_int 59
MB91520 Series
MN705-00010-1v0-E
874