Fujitsu FR81S User Manual
CHAPTER 23: 32-BIT INPUT CAPTURE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 32-BIT INPUT CAPTURE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
7
Table 4-2 Registers Map
Address
Registers
Register function
+0
+1
+2
+3
0x0FD0
IPCP4
Input capture data register 4
0x0FD4
IPCP5
Input capture data register 5
0x0FD8 Reserved Reserved LSYNS1
ICS45
LIN SYNCH FIELD switching register 1
Input capture control register 45
0x0FDC
IPCP6
Input capture data register 6
0x0FE0
IPCP7
Input capture data register 7
0x0FE4
Reserved
Reserved
ICS67
Input capture control register 67
0x0FE8
IPCP8
Input capture data register 8
0x0FEC
IPCP9
Input capture data register 9
0x0FF0
Reserved
Reserved
ICS89
Input capture control register 89
0x0118
MSCY4
Cycle measurement data register 4
0x011C
MSCY5
Cycle measurement data register 5
0x0F88
Reserved
MSCH45 MSCL45
Cycle and pulse width measurement control
register 45
0x0F68
MSCY6
Cycle measurement data register 6
0x0F6C
MSCY7
Cycle measurement data register 7
0x0F8C
Reserved
MSCH67 MSCL67
Cycle and pulse width measurement control
register 67
0x0FF4
MSCY8
Cycle measurement data register 8
0x0FF8
MSCY9
Cycle measurement data register 9
0x0FFC
Reserved
MSCH89 MSCL89
Cycle and pulse width measurement control
register 89
MB91520 Series
MN705-00010-1v0-E
882