Fujitsu FR81S User Manual
CHAPTER 23: 32-BIT INPUT CAPTURE
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 32-BIT INPUT CAPTURE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
20
Figure 5-3 Example of the Cycle and Pulse Width Measurement Operation (The both edges
are specified).
When the both edges are specified, cycle of from rising edge to rising edge and from falling edge
to falling edge, pulse width of from rising edge to falling edge and from falling edge to rising
edge are measured.
Counter value
FFFFFFFFh
00000000h
input
7FFFFFFFh
Cycle measurement
data register 0/1
data register 0/1
Over flow detect
0
A
B
Full count
Full count
E
※do not measurement by first edge
A
B
C
D
E
C(max value)
D(max value)
Pulse width
measurement flag bit
0/1
measurement flag bit
0/1
Cycle measurement
flag bit 0/1
flag bit 0/1
0
A+B
C(max value)+D(max value)
B+C(max value)
↑~↑
↓~↓
↑~↑
H
L
↑~↑
↓~↓
Interrupt factor
(cycle・pulse width
measurement by both
edge )
interrupt
↑
Interrupt clear
Interrupt clear
Pulse width
measurement over flow
flag bit 0/1
measurement over flow
flag bit 0/1
Cycle measurement
over flow flag bit 0/1
over flow flag bit 0/1
Input capture data
register 0/1
register 0/1
Input capture
data register 4/5
data register 4/5
Cycle measurement
data register 4/5
data register 4/5
Over flow detect
Pulse width measurement
over flow flag bit 4/5
over flow flag bit 4/5
Cycle measurement
over flow flag bit 4/5
over flow flag bit 4/5
Pulse width measurement
flag bit 4/5
Cycle measurement
flag bit 4/5
flag bit 4/5
Cycle measurement
flag bit 4/5
MB91520 Series
MN705-00010-1v0-E
895