Fujitsu FR81S User Manual
CHAPTER 24: 16-BIT FREE-RUN TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : 16-BIT FREE-RUN TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
42
5.2.4.
Timer Interrupt
For the 16-bit free-run timer, you will be able to generate the following two types of interrupt.
⋅
Compare clear interrupt
⋅
0 detection interrupt
The compare clear interrupt will be generated when the timer value matches the value of the compare clear
register.
The 0 detection interrupt will be generated when the timer value becomes "0000
H
".
Note:
Software clear (SCLR: bit20 of the TCCS register is 1) does not generate the 0 detection interrupt.
Figure 5-6 Interrupt Generated in the Up Count Mode (MODE: bit21 of the TCCS register is 0)
Count value
Compare clear
Compare clear
interrupt
0 detection
0 detection
interrupt
N
N- 1
N- 2
N- 3
0
1
2
3
4
5
6
7
Figure 5-7 Interrupt Generated in the Up/Down Count Mode (MODE: bit21 of the TCCS
register is 1)
Count value
Compare clear
Compare clear
interrupt
0 detection
0 detection
interrupt
N- 1
N
N- 1
N- 2
N- 2
2
1
0
1
2
3
∬
∬
∬
∬
∬
∬
MB91520 Series
MN705-00010-1v0-E
949