Fujitsu F2MCTM-16LX User Manual

127

CHAPTER 7  RESETS

■

When the reset is cleared, the CPU transfers the reset vector and the mode data to the appropriate registers

in the CPU core by hardware. The reset vector and mode data are allocated to the four bytes from

"FFFFDC

H

" to "FFFFDF

H

". The CPU outputs these addresses to the bus immediately after the reset is

cleared and then fetches the reset vector and mode data. Using mode fetching, the CPU can begin

processing at the address indicated by the reset vector.

Figure 7.4-2 shows the transfer of the reset vector and mode data.

●

Mode data (address: FFFFDF

H

)

Only a reset operation changes the contents of the mode register. The mode register setting is valid after a

reset operation. See "9.1.2  Mode Data", for details on mode data.

●

Reset vector (address: FFFFDC

H

 to FFFFDE

H

)

The reset vector points to the start address after the reset operation. The CPU starts to execute the first

instruction stored in the start address.

PCB

PC

FFFFDF

H

FFFFDE

H

FFFFDD

H

FFFFDC

H

F

2

MC-16LX CPU core

Mode register

Micro ROM

Reset sequence

Memory space

Mode data

Reset vector bits (23 to 16)

Reset vector bits (15 to 8)

Reset vector bits (7 to 0)