Epson ARM720T User Manual

Epson

9: Debugging Your System

ARM720T CORE CPU MANUAL

EPSON

9-1

9

Debugging Your System

This chapter describes how to debug a system based on an ARM720T processor. It contains the

following sections:

About debugging your system ................................................................... 9-2

Controlling debugging................................................................................ 9-3

Entry into debug state ............................................................................... 9-5

Debug interface .......................................................................................... 9-9

ARM720T core clock domains.................................................................... 9-9

The EmbeddedICE-RT macrocell ............................................................ 9-10

Disabling EmbeddedICE-RT ....................................................................9-11

EmbeddedICE-RT register map .............................................................. 9-12

Monitor mode debugging ......................................................................... 9-12

The debug communications channel ....................................................... 9-14

Scan chains and the JTAG interface ....................................................... 9-17

The TAP controller ................................................................................... 9-19

Public JTAG instructions......................................................................... 9-20

Test data registers.................................................................................... 9-22

Scan timing............................................................................................... 9-25

Examining the core and the system in debug state ............................... 9-26

Exit from debug state............................................................................... 9-29

The program counter during debug......................................................... 9-30

Priorities and exceptions.......................................................................... 9-32

Watchpoint unit registers ........................................................................ 9-33

Programming breakpoints ....................................................................... 9-36

Programming watchpoints....................................................................... 9-38

Abort status register ................................................................................ 9-38

Debug control register.............................................................................. 9-39

Debug status register............................................................................... 9-41

Coupling breakpoints and watchpoints .................................................. 9-43

EmbeddedICE-RT timing ........................................................................ 9-44