AMD LX 600@0.7W User Manual

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346
AMD Geode™ LX Processors Data Book 
Display Controller Register Descriptions
33234H
6.6.11.4 DC VBI Odd Line Enable (DC_VBI_LN_ODD)
Settings written to this register do not take effect until the start of the following frame or interlaced field.
6.6.11.5 DC VBI Even Line Enable (DC_VBI_LN_EVEN)
Settings written to this register do not take effect until the start of the following frame or interlaced field.
DC Memory Offset 0ACh
Type
R/W
Reset Value
xxxxxxxxh
 DC_VBI_LN_ODD Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
LN_OFFSET_ODD
LN_EN_ODD
RSVD
 DC_VBI_LN_ODD Bit Descriptions
Bit
Name
Description
31:25
LN_OFFSET_
ODD
Odd Line Offset. Specifies the offset (in lines) of the start of VBI data from the initial 
edge of VSYNC. This field is not used if interlacing is disabled. This field must be set to a 
value of 126 or less.
24:2
LN_EN_ODD
Odd Line Enable. Each of the bits in this field corresponds to a line (24-2) of VBI data. 
Setting a bit in this field to 1 enables the corresponding line of VBI data in the odd field. 
This field is not used if interlacing is disabled.
1:0
RSVD
Reserved. Set to 0.
DC Memory Offset 0B0h
Type
R/W
Reset Value
xxxxxxxxh
DC_VBI_LN_EVEN Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
LN_OFFSET_EVEN
LN_EN_EVEN
RSVD
 DC_VBI_LN_EVEN Bit Descriptions
Bit
Name
Description
31:25
LN_OFFSET_
EVEN
Even Line Offset. Specifies the offset (in lines) of the start of VBI data from the initial 
edge of VSYNC. This field is used for all frames if interlacing is disabled. This field must 
be set to a value of 126 or less.
24:2
LN_EN_EVEN
Even Line Enable. Each of the bits in this field corresponds to a line (24-2) of VBI data. 
Setting a bit in this field to 1 enables the corresponding line of VBI data in the even field. 
This field is used for all frames if interlacing is disabled.
1:0
RSVD
Reserved. Set to 0.