AMD LX 600@0.7W User Manual
418
AMD Geode™ LX Processors Data Book
Video Processor Register Descriptions
33234H
6.8.1.5
GLD Power Management MSR (GLD_MSR_PM)
6.8.1.6
GLD Diagnostic MSR (GLD_MSR_DIAG)
This register is reserved for internal use by AMD and should not be written to.
MSR Address
48002004h
Type
R/W
Reset Value
00000000_00000555h
GLD_MSR_PM Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RSVD
SP
RSVD
PMD5
RSVD
PMD4
RSVD
PMD3
RSVD
PMD2
RSVD
PMD1
RSVD
PMD0
GLD_MSR_PM Bit Descriptions
Bit
Name
Description
63:28
RSVD
Reserved.
27:24
SP
Spare. Read/write, no function.
23:11
RSVD
Reserved.
10
PMD5
VOP 2x Dot Clock Power Mode.
0: Disable clock gating. Clocks are always ON.
1: Enable active hardware clock gating.
1: Enable active hardware clock gating.
9
RSVD
Reserved.
8
PMD4
VP Video Dot Clock Power Mode.
0: Disable clock gating. Clocks are always ON.
1: Enable active hardware clock gating.
1: Enable active hardware clock gating.
7
RSVD
Reserved.
6
PMD3
FP Dot Clock Power Mode.
0: Disable clock gating. Clocks are always ON.
1: Enable active hardware clock gating.
1: Enable active hardware clock gating.
5
RSVD
Reserved.
4
PMD2
FP GLIU Clock Power Mode.
0: Disable clock gating. Clocks are always ON.
1: Enable active hardware clock gating.
1: Enable active hardware clock gating.
3
RSVD
Reserved.
2
PMD1
VP Graphics Dot Clock Power Mode.
0: Disable clock gating. Clocks are always ON.
1: Enable active hardware clock gating.
1: Enable active hardware clock gating.
1
RSVD
Reserved.
0
PMD0
VP GLIU Clock Power Mode.
0: Disable clock gating. Clocks are always ON.
1: Enable active hardware clock gating.
1: Enable active hardware clock gating.
MSR Address
48002005h
Type
R/W
Reset Value
00000002_00000000h