AMD SC2200 User Manual
142
AMD Geode™ SC2200 Processor Data Book
SuperI/O Module
32580B
Table 5-47. Bank Selection Encoding
BSR Bits
Bank Selected
Functionality
7
6
5
4
3
2
1
0
0
x
x
x
x
x
x
x
0
UART + IR
1
0
x
x
x
x
x
x
1
1
1
x
x
x
x
1
x
1
1
1
x
x
x
x
x
1
1
1
1
1
0
0
0
0
0
2
1
1
1
0
0
1
0
0
3
1
1
1
0
1
0
0
0
4
IR Only
1
1
1
0
1
1
0
0
5
1
1
1
1
0
0
0
0
6
1
1
1
1
0
1
0
0
7
Table 5-48. Bank 1 Register Map
Offset
Type
Name
00h
R/W
LBGD(L). Legacy Baud Generator Divisor Port (Low Byte)
01h
R/W
LBGD(H). Legacy Baud Generator Divisor Port (High Byte)
02h
---
RSVD. Reserved
03h
W
LCR
1
. Link Control
R/W
. Bank Select
04h-07h
---
RSVD. Reserved
1.
When bit 7 of this register is set to 1, bits [6:0] of BSR select the bank, as shown in Table 5-47.
Table 5-49. Bank 2 Register Map
Offset
Type
Name
00h
R/W
BGD(L). Baud Generator Divisor Port (Low Byte)
01h
R/W
BGD(H). Baud Generator Divisor Port (High Byte)
02h
R/W
EXCR1. Extended Control 1
03h
R/W
BSR. Bank Select
04h
R/W
EXCR2. Extended Control 2
05h ---
RSVD. Reserved
06h
RO
TXFLV. TX FIFO Level
07h
RO
RXFLV. RX FIFO Level