Analog Devices ADuC832 Leaflet

F7FFh

0000h

FFFFh

0000h

FFFFh

F800h

ADD A,source

1,2 12

add source to A

ADD A,#data

2

12

ADDC A,source

1,2 12

add with carry

ADDC A,#data

2

12

SUBB A,source

subtract from A 1,2 12

with borrow

SUBB A,#data

2

12

INC

A

1

12

INC

source

increment

1,2 12

INC

DPTR 

1

24

DEC A

1

12

decrement

DEC source

1,2 12

MUL AB

multiply A by B

1

48

DIV

AB

divide A by B

1

48

DA

A

decimal adjust

1

12

MOV A,source

1,2 12

MOV A,#data

2

12

MOV dest,A

move source

1,2 12

to destination

MOV dest,source

1,2,3 24

MOV dest,#data

2,3 12,24

MOV  DPTR,#data16

3

24

MOVC A,@A+DPTR move from

1

24

code memory

MOVC A,@A+PC

1

24

MOVX A,@Ri

1

24

MOVX A,@DPTR

move to/from

1

24

data memory

MOVX @Ri,A

1

24

MOVX @DPTR,A

1

24

PUSH direct

push onto stack 2

24

POP direct

pop from stack

2

24

XCH A,source

exchange bytes 1,2 12

XCHD A,@Ri

exchg low digits 1

12

ACALL addr11

2

24

call subroutine

LCALL addr16

3

24

RET

return from sub. 1

24

RETIreturn from int.

1

24

AJMP addr11

2

24

LJMP addr16

3

24

jump

SJMP rel

2

24

JMP

@A+DPTR

1

24

JZ

rel

jump if  A = 0

2

24

JNZ

rel

jump if  A not 0

2

24

CJNE A,direct,rel

3

24

CJNE A,#data,rel

compare and

3

24

jump if not

CJNE Rn,#data,rel equal

3

24

CJNE @Ri,#data,rel

2

24

DJNZ Rn,rel

decrement and

2

24

jump if not zero

DJNZ direct, rel

3

24

NOP

no operation

1

12

CLR

C

1

12

clear bit to zero

CLR

bit

2

12

SETB C

1

12

set bit to one

SETB bit

2

12

CPL

C

1

12

complement bit

CPL

bit

2

12

ANL

C,bit

AND bit with C

2

24

ANL

C,/bit

...NOTbit with C 2

24

ORL

C,bit

OR bit with C

2

24

ORL

C,/bit

...NOTbit with C 2

24

MOV C,bit

2

12

move bit to bit

MOV bit,C

2

24

JC

rel

jump if C set

2

24

JNC

rel

jmp if C not set

2

24

JB

bit,rel

jump if bit set

3

24

JNB

bit,rel

jmp if bit not set 3

24

JBC

bit, rel

jmp&clear if set 3

24

ANL

A,source

1,2 12

ANL

A,#data

2

12

logical AND

ANL

direct,A

2

12

ANL

direct,#data

3

24

ORL

A,source

1,2 12

ORL

A,#data

2

12

logical OR

ORL

direct,A

2

12

ORL

direct,#data

3

24

XRL

A,source

1,2 12

XRL

A,#data

2

12

logical XOR

XRL

direct,A

2

12

XRL

direct,#data

3

24

CLR

A

clear A to zero

1

12

CPL

A

complement A

1

12

RL

A

rotate A left

1

12

RLC

A

...through C

1

12

RR

A

rotate A right

1

12

RRC A

...through C

1

12

SWAP A

swap nibbles

1

12

Rn

register addressing using R0-R7

direct

8bit internal address (00h-FFh)

@Ri

indirect addressing using R0 or R1

source

any of [Rn, direct, @Ri]

dest

any of [Rn, direct, @Ri]

#data

8bit constant included in instruction

#data16 16bit constant included in instruction
bit

8bit direct address of bit

rel

signed 8bit offset

addr11

11bit address in current 2K page

addr16

16bit address

EQU

define symbol

DATA

define internal memory symbol

IDATA

define indirect addressing symbol

XDATA define external memory symbol

BIT

define internal bit memory symbol

CODE

define program memory symbol

DS

reserve bytes of data memory

DBIT

reserve bits of bit memory

DB

store byte values in program memory

DW

store word values in program memory

ORG

set segment location counter

END

end of assembly source file

CSEG

select program memory space

XSEG

select external data memory space

DSEG

select internal data memory space

ISEG

select indirectly addressed internal

data memory space

BSEG

select bit addressable memory space

PRINTED IN U.S.A.

G03203-2.5-9/02 (0)

 INC DPTR increments the 24bit value DPP/DPH/DPL

EA=1

62K bytes

Flash/EE

EA=0

(64K

addressable)

(NOP instructions)

14 16 P1.7 / ADC7
15 17 RESET
16 18 P3.0 / RxD
17 19 P3.1 / TxD
18 20 P3.2 / INT0
19 21 P3.3/INT1/MISO/PWM1
20 22 DV

DD

21 23 DGND
22 24
23 25 P3.5 / T1 / CONVST
24 26 P3.6 / WR
25 27 P3.7 / RD
26 28 SCLOCK

1

56 P1.0 / ADC0 / T2

2

1

P1.1 / ADC1 / T2EX

3

2

P1.2 / ADC2

4

3

P1.3 / ADC3

5 4,5 AV

DD

6 6,7,8 AGND
7

9

C

REF

8

10 V

REF

9

11 DAC0

10 12 DAC1
11 13 P1.4 / ADC4
12 14 P1.5 / ADC5 / SS
13 15 P1.6 / ADC6

27 29 SDATA / MOSI
28 30 P2.0 / A8 / A16
29 31 P2.1 / A9 / A17
30 32 P2.2 / A10 / A18
31 33 P2.3 / A11 / A19
32 34 XTAL1 (in)
33 35 XTAL2 (out)
34 36 DV

DD

35 37,38 DGND
36 39 P2.4 / A12 / A20
37 40 P2.5 / A13 / A21
38 41 P2.6/A14/A22/PWM0
39 42 P2.7/A15/A23/PWM1

40 43 EA
41 44 PSEN
42 45 ALE
43 46 P0.0 / AD0
44 47 P0.1 / AD1
45 48 P0.2 / AD2
46 49 P0.3 / AD3
47 50 DGND
48 51 DV

DD

49 52 P0.4 / AD4
50 53 P0.5 / AD5
51 54 P0.6 / AD6
52 55 P0.7 / AD7

Power Supply Monitor Interrupt

43h

1

WatchDog Timer Interrupt

5Bh

2

IE0

External Interrupt 0

03h

3

End of ADC Conversion Interrupt

33h

4

TF0

Timer0 Overflow Interrupt

0Bh

5

IE1

External Interrupt 1

13h

6

TF1

Timer1 Overflow Interrupt

1Bh

7

SPI/I2C Interrupt

3Bh

8

RI/TI

UART Interrupt

23h

9

TF2/EXF2

Timer2 Interrupt

2Bh

10

Time Interval Counter Interrupt

53h

11

P3.4 / T0 / PWMC /

PWM0 / EXTCLK

bytes OSC

   periods

bytes OSC

   periods

bytes OSC

   periods

bytes OSC

   periods

bytes OSC

   periods

12bit, 5µs, 8channel, self calibrating

0.5LSB INL & 70dB SNR

dual, 12bit, 15µs, voltage output

1LSB DNL

62K bytes Flash/EE program memory

4K bytes Flash/EE data memory

industry standard 8052

32 I/O lines, programmable PLL clock

(131KHz to 16.8MHz from 32KHz crystal)

other on-chip features: temperature sensor, power supply monitor,

watchdog timer, flexible serial interface ports,

voltage reference, time interval counter,

dual 8/16bit PWM, power-on-reset

www.analog.com/microconverter 

REV. 0

52pin MQFP

TOP VIEW

(not to scale)

56pin CSP

TOP VIEW

(not to scale)

MQFP CSP

MQFP CSP

MQFP CSP

BUF

BUF

T/H

(-3 mV/

o

C)

BUF

synchronous

serial interface

(

 or 

)

AIN

MUX

DAC

control

ADC

control

&

calibration

2.5V

bandgap

reference

TEMP

sensor

asynchronous

serial port

(

)

MCU

core

downloader

debugger

single-pin emulator

16bit

counter

timers

OSC &

PLL

time

interval

counter

power supply

monitor

watchdog

timer

256 x 8

user RAM

2K x 8

user “XRAM”

PWM

62K x 8

program

4K x 8

data

POR

baudrate timer