Texas Instruments TMS320C2XX User Manual

Subtract From Accumulator With Borrow

7-178

 

SUBB 

dma

Direct addressing

SUBB 

ind [, ARn]

Indirect addressing

dma:

7 LSBs of the data-memory address

n:

Value from 0 to 7 designating the next auxiliary register

ind:

Select one of the following seven options:
*     *+     *–     *0+     *0–     *BR0+     *BR0–

SUBB 

dma

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

0

1

1

0

0

1

0

0

0

dma

SUBB 

ind [, ARn]

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

0

1

1

0

0

1

0

0

1

ARU

N

NAR

ARU, N, and NAR are defined in Section 6.3, 

Indirect Addressing Mode

 (page 6-9).

Increment PC, then ...
(ACC) – (data-memory address) – (logical inversion of C ) 

→

ACC

Affected by

Affects

OVM

OV and C

This instruction is not affected by SXM.

The content of the addressed data-memory location and the logical inversion
of the carry bit is subtracted from the accumulator with sign extension sup-
pressed. The carry bit is then affected in the normal manner: the carry bit is
cleared (C = 0) if the result of the subtraction generates a borrow and is set
(C = 1) if it does not generate a borrow.

The SUBB instruction can be used in performing multiple-precision arithmetic.

1

DARAM

1

1

1

1+p

SARAM

1

1

1, 2

†

1+p

External

1+d

1+d

1+d

2+d+p

† If the operand and the code are in the same SARAM block