Renesas 6NM User Manual

Rev.1.10    Jul 01, 2005    page 61 of 318
REJ09B0124-0110

M16C/6N Group (M16C/6NK, M16C/6NM)

9. Interrupt

This document is under development and its contents are subject to change.

A software interrupt occurs when executing certain instructions. Software interrupts are non-maskable

interrupts.

An undefined instruction interrupt occurs when executing the UND instruction.

An overflow interrupt occurs when executing the INTO instruction with the O flag set to “1” (the operation

resulted in an overflow).  The following are instructions whose O flag changes by arithmetic:

ABS, ADC, ADCF, ADD, CMP, DIV, DIVU, DIVX, NEG, RMPA, SBB, SHA, SUB

A BRK interrupt occurs when executing the BRK instruction.

An INT instruction interrupt occurs when executing the INT instruction. Software interrupt Nos. 0 to 63 can

be specified for the INT instruction. Because software interrupt Nos. 1 to 31 are assigned to peripheral

function interrupts, the same interrupt routine as for peripheral function interrupts can be executed by

executing the INT instruction.

In software interrupt Nos. 0 to 31, the U flag is saved to the stack during instruction execution and is set

to “0” (ISP selected) before executing an interrupt sequence. The U flag is restored from the stack when

returning from the interrupt routine. In software interrupt Nos. 32 to 63, the U flag does not change state

during instruction execution, and the SP then selected is used.