Intel PXA26X User Manual
Intel® PXA26x Processor Family Developer’s Manual
5-1
Direct Memory Access Controller
5
This chapter describes the on-chip direct memory access (DMA) controller (DMAC) for the Intel®
PXA26x Processor Family. The DMAC transfers data to and from main memory in response to
requests generated by internal and external peripherals. The peripherals do not directly supply
addresses and commands to the memory system. The DMAC has 16 DMA channels, 0 through 15,
and every DMA request from the peripheral generates at least one memory bus cycle.
PXA26x Processor Family. The DMAC transfers data to and from main memory in response to
requests generated by internal and external peripherals. The peripherals do not directly supply
addresses and commands to the memory system. The DMAC has 16 DMA channels, 0 through 15,
and every DMA request from the peripheral generates at least one memory bus cycle.
5.1
Direct Memory Access Description
The DMAC only supports flow-through transfers.
Flow-through data passes through the DMAC before the data is latched by the destination in its
buffers/memory. This DMA Controller can perform memory-to-memory moves with flow-through
transfers.
buffers/memory. This DMA Controller can perform memory-to-memory moves with flow-through
transfers.
descriptions.