Motorola MC68340 User Manual

6- 44

MC68340 USER’S MANUAL

MOTOROLA

***************************************************************************
* DMA Channel 1 equates
DMACH1

EQU $780

Offset from MBAR for channel 1 regs

DMAMCR1

EQU $0

MCR for channel 1

* Channel 1 register offsets from channel 1 base address
DMAINT1

EQU $4

interrupt register channel 1

DMACCR1

EQU $8

control register channel 1

DMACSR1

EQU $A

status register channel 1

DMAFCR1

EQU $B

function code register channel 1

DMASAR1

EQU $C

source address register channel 1

DMADAR1

EQU $10

destination address register channel 1

DMABTC1

EQU $14

byte transfer count register channel 1

SARADD

EQU $6001

source address is an ODD address

DARADD

EQU $10000

destination address is and EVEN address

NUMBYTE

EQU $14

number of bytes to transfer

***************************************************************************
***************************************************************************
* Initialize DMA Channel 1
***************************************************************************

LEA

MODBASE+DMACH1,A0 Pointer to channel 1

* Initialize DMA channel 1 MCR
* Normal Operation, ignore FREEZE, dual-address mode. ISM field at 0. Make
* CPU32 SR I2-I0 bits are less than or equal to ISM bits for channel startup.
* Supervisor/user reg. unrestricted, MAID field at 4. IARB priority at 8.

MOVE.W

#$00C8,(A0)

* Clear channel control reg.
* Clear STR (start) bit to prevent the channel from starting a transfer early.

CLR.W

DMACCR1(A0)

* Initialize interrupt reg.
* Interrupt priority at 7, interrupt vector at $42.

MOVE.W

#$0742,DMAINT1(A0)

* Initialize channel status reg.
* Clear the DONE, BES, BED, CONF and BRKP bits to allow channel to startup.

MOVE.B

#$7C,DMACSR1(A0)

* Initialize function code reg.
* DMA space, supervisor data space for source and destination.

MOVE.B

#$DD,DMAFCR1(A0)

* Initialize source operand address

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