Motorola MC68340 User Manual

MOTOROLA

3- 37

 

S0

S2

S0

S2

SW

S4

SW

S4

READ RERUN

HALT

READ CYCLE WITH

RETRY

DATA

IGNORED

CLKOUT

DSACKx

R/W

AS

DS

BERR

A31–A0

FC3–FC0

D15–D0

HALT

The MC68340 retries any read or write cycle of a read-modify-write operation separately;

RMC

 remains asserted during the entire retry sequence. Asserting 

BR

 along with 

BERR

and 

HALT

 provides a relinquish and retry operation. The MC68340 does not relinquish the

bus during a read-modify-write operation. Any device that requires the MC68340 to give
up the bus and retry a bus cycle during a read-modify-write cycle must assert only 

BERR

and 

BR

 (

HALT

 must not be included). The bus error handler software should examine the

read-modify-write bit in the special status word (see Section 5 CPU32) and take the
appropriate action to resolve this type of fault when it occurs.

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Freescale Semiconductor, Inc.

For More Information On This Product,

   Go to: www.freescale.com

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