National Instruments VXI-USB User Manual

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Glossary
© National Instruments Corporation
G-3
byte order
How bytes are arranged within a word or how words are arranged within 
a longword. Motorola ordering stores the most significant byte (MSB) or 
word first, followed by the least significant byte (LSB) or word. Intel 
ordering stores the LSB or word first, followed by the MSB or word.
C
C
Celsius
CLK10
A 10 MHz, ±100 ppm, individually buffered (to each module slot), 
differential ECL system clock that is sourced from Slot 0 of a VXIbus 
mainframe and distributed to Slots 1 through 12 on P2. It is distributed to 
each slot as a single-source, single-destination signal with a matched delay 
of under 8 ns.
Commander
A message-based device that is also a bus master and can control one or 
more Servants.
configuration registers
A set of registers through which the system can identify a module 
device type, model, manufacturer, address space, and memory 
requirements. To support automatic system and memory configuration, 
the VXI specification requires that all VXIbus devices have a set of such 
registers.
D
Data Transfer Bus
DTB; one of four buses on the VMEbus backplane. The DTB is used by a 
bus master to transfer binary data between itself and a slave device.
DMA
Direct Memory Access—a method by which data is transferred between 
devices and internal memory without intervention of the central processing 
unit. DMA is the fastest method of transferring data to/from computer 
memory.
DRAM
Dynamic RAM (Random Access Memory)—storage that the computer 
must refresh at frequent intervals.
dynamic 
configuration
A method of automatically assigning logical addresses to VXIbus devices 
at system startup or other configuration times.