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Nxp Semiconductors UM10237 User Manual

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UM10
237_
2
©
 NXP
 B.V
. 2008.
 Al
l r
ig
h
ts
 r
e
s
e
rv
ed.
User m
anu
al
R
ev
. 02 —
 19 Decem
ber 200
8 
425 of
 792
N
X
P Semi
conductor
s
UM10237
Cha
pte
r 16:
 LPC2
4XX Un
iv
ers
a
l 
Asy
nch
rono
us Rece
iv
er/T
ra
ns
mit
te
r
[1]
Reset Value reflects the data stored in used bits only. It does not include reserved bits content.
LSR
Line Status 
Register
RX 
FIFO 
Error
TEMT
THRE
BI
FE
PE
OE
DR
RO
0x60
U0LSR - 0xE000 C014
U2LSR - 0xE007 8014
U3LSR - 0xE007 C014
SCR
Scratch Pad 
Register
8 bit Data
R/W
0x00
U0SCR - 
0xE000 C01C
U2SCR - 
0xE007 801C
U3SCR - 
0xE007 C01C
ACR
Auto-baud 
Control 
Register
Reserved [31:10]
ABTO 
IntClr
ABEO 
IntClr
R/W
0x00
U0ACR - 
0xE000 C020
U2ACR - 0xE007 8020
U3ACR - 
0xE007 C020
Reserved [7:3]
Auto 
Reset
Mode
Start
ICR
IrDA Control 
Register
Reserved
PulseDiv
FixPulse 
En
IrDAInv
IrDAEn
R/W
0
U3ICR - 0xE000 C024
(UART3 only)
FDR
Fractional 
Divider Register
MulVal
DivAddVal
R/W
0x10
U0FDR - 0xE000 C028
U2FDR - 0xE007 8028
U3FDR - 0xE007 C028
TER
Transmit 
Enable Register
TXEN
Reserved
R/W
0x80
U0TER - 0xE000 C030
U2TER - 0xE007 8030
U3TER - 0xE007 C030
Table 377. UART Register Map
Generic 
Name
Description
Bit functions and addresses
Acces
s
Reset 
value
[
1]
UARTn Register 
Name & Address
MSB
LSB