IBM MiEM78P468L User Manual
EM78P468N/EM78P468L
8-Bit Microcontroller
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Product Specification (V1.5) 02.15.2007
(This specification is subject to change without further notice)
6.2.3 IOC60/P6CR (Port 6 I/O Control Register)
(Address: 06h, Bit 0 of R5 = “0”)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
IOC67 IOC66 IOC65 IOC64 IOC63 IOC62 IOC61 IOC60
Bit 7 (IOC67) ~ Bit 0(IOC60): Port 6 I/O direction control register
IOC6x =”0”: set the relative Port 6.x I/O pins as output
IOC6x =”1”: set the relative Port 6.x I/O pin into high impedance (input pin)
6.2.4
IOC70/P7CR (Port 7 I/O Control Register)
(Address: 07h, Bit 0 of R5 = “0”)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
IOC77 IOC76 IOC75 IOC74 IOC73 IOC72 IOC71 IOC70
Bit 7 (IOC77) ~ Bit 0 (IOC70): Port 7 I/O direction control register
IOC7x = “0”: set the relative Port 7.x I/O pins as output
IOC7x = “1”: set the relative Port 7.x I/O pin into high impedance (input pin)
6.2.5
IOC80/P8CR (Port 8 I/O Control Register)
(Address: 08h, Bit 0 of R5 = “0”)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
IOC87 IOC86 IOC85 IOC84 IOC83 IOC82 IOC81 IOC80
Bit 7 (IOC 87) ~ Bit 0 (IOC 80): Port 8 I/O direction control register
IOC8x = “0”: set the relative Port 8.x I/O pins as output
IOC8x = “1”: set the relative Port 8.x I/O pin into high impedance (input pin)
6.2.6 IOC90/RAM_ADDR (128 Bytes RAM Address)
(Address: 09h, Bit 0 of R5 = “0”)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
RAM_A6 RAM_A5 RAM_A4 RAM_A3 RAM_A2 RAM_A1 RAM_A0
Bit 7: Not used, fixed at “0”
Bits 6~0: 128 bytes RAM address
6.2.7 IOCA0/RAM_DB (128 Bytes RAM Data Buffer)
(Address: 0Ah, Bit 0 of R5 = “0”)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RAM_D7 RAM_D6 RAM_D5 RAM_D4 RAM_D3 RAM_D2 RAM_D1 RAM_D0
Bits 7~0: 128 bytes RAM data transfer register