Mitsubishi DS5000TK User Manual
USER’S GUIDE
050396 1/173
2
SECTION 1: INTRODUCTION
The Secure Microcontroller family is a line of
8051–compatible devices that utilize nonvolatile RAM
(NV RAM) rather than ROM for program storage. The
use of NV RAM allows the design of a “soft” microcon-
troller which provides a number of unique features to
embedded system designers. Foremost among these is
the enhanced security features that are employed by
the Secure Microcontroller Family to protect the user
application software against piracy and tampering.
These devices offer varying degrees of security, ranging
from simple access prevention to a full encryption of
program and data memory of the device. Attempts to
gain access to protected information will result in the
self–destruction of all data. The Secure Microcontroller
family is the heart of a wide range of security–critical ap-
plications such as electronic banking, commercial
transactions, and pay TV access control, or any situa-
tion which requires the protection of proprietary soft-
ware and algorithms.
8051–compatible devices that utilize nonvolatile RAM
(NV RAM) rather than ROM for program storage. The
use of NV RAM allows the design of a “soft” microcon-
troller which provides a number of unique features to
embedded system designers. Foremost among these is
the enhanced security features that are employed by
the Secure Microcontroller Family to protect the user
application software against piracy and tampering.
These devices offer varying degrees of security, ranging
from simple access prevention to a full encryption of
program and data memory of the device. Attempts to
gain access to protected information will result in the
self–destruction of all data. The Secure Microcontroller
family is the heart of a wide range of security–critical ap-
plications such as electronic banking, commercial
transactions, and pay TV access control, or any situa-
tion which requires the protection of proprietary soft-
ware and algorithms.
The Secure Microcontroller family is divided between
chips and modules. The chips are monolithic micropro-
cessors that connect to a standard SRAM and lithium
battery. The modules combine the microprocessor with
the SRAM and lithium battery in a preassembled, pre-
tested module. Depending on the specific configuration,
modules are available in either 40–pin encapsulated
DIP or SIMM module format.
chips and modules. The chips are monolithic micropro-
cessors that connect to a standard SRAM and lithium
battery. The modules combine the microprocessor with
the SRAM and lithium battery in a preassembled, pre-
tested module. Depending on the specific configuration,
modules are available in either 40–pin encapsulated
DIP or SIMM module format.
In addition to NV RAM, Dallas Semiconductor micro-
controllers offer a number of peripherals that simplify
and reduce the cost of embedded systems. Although
the specific features of each chip or module vary, all de-
vices offer the following basic feature set:
controllers offer a number of peripherals that simplify
and reduce the cost of embedded systems. Although
the specific features of each chip or module vary, all de-
vices offer the following basic feature set:
•
100% code–compatible with 8051
•
Directly addresses 64KB program/64KB data
memory
memory
•
Nonvolatile memory control circuitry
•
10–year data retention in the absence of power
•
In–system reprogramming via serial port
•
128 bytes fast access scratchpad RAM
•
Two 16–bit general purpose timer/counters
•
One UART
•
Five interrupts with two external
•
Dedicated memory bus, preserving four 8–bit ports
for general purpose I/O
for general purpose I/O
•
Power–Fail Reset
•
Early Warning Power Fail Interrupt
•
Watchdog Timer
SOFTWARE SECURITY
One of the most important features of the Secure Micro-
controller family is firmware/memory security. The de-
vices were specifically designed to offer an unprece-
dented level of protection to the user application
software, preventing unauthorized copying of firmware
and denying access to critical data values. The use of
RAM rather than the traditional ROM or EPROM for pro-
gram storage increases the security, since tampering
with the system will result in the loss of the RAM con-
tents. Additional features such as real–time high–speed
memory encryption, generation of dummy addresses
on the bus, and internal storage of vector RAM in-
creases the security of a Secure Microcontroller/Micro-
processor–based system.
controller family is firmware/memory security. The de-
vices were specifically designed to offer an unprece-
dented level of protection to the user application
software, preventing unauthorized copying of firmware
and denying access to critical data values. The use of
RAM rather than the traditional ROM or EPROM for pro-
gram storage increases the security, since tampering
with the system will result in the loss of the RAM con-
tents. Additional features such as real–time high–speed
memory encryption, generation of dummy addresses
on the bus, and internal storage of vector RAM in-
creases the security of a Secure Microcontroller/Micro-
processor–based system.
The DS5002FP Secure Microprocessor Chip and
DS2252T Secure Microcontroller Module offer the high-
est level of security, with permanently enabled memory
encryption, a 64–bit random encryption key, and a self–
destruct input for tamper protection. The DS5000FP
Soft Microprocessor Chip and DS5000(T) and
DS2250(T) Soft Microcontroller Modules offer lesser,
but still substantial, protection with optional data encryp-
tion and a 48–bit encryption key.
DS2252T Secure Microcontroller Module offer the high-
est level of security, with permanently enabled memory
encryption, a 64–bit random encryption key, and a self–
destruct input for tamper protection. The DS5000FP
Soft Microprocessor Chip and DS5000(T) and
DS2250(T) Soft Microcontroller Modules offer lesser,
but still substantial, protection with optional data encryp-
tion and a 48–bit encryption key.
SEPARATE ADDRESS/DATA BUS
Soft Microprocessor chips provide a non–multiplexed
address/data bus that interfaces to memory without in-
terfering with I/O ports. This Byte–wide bus connects di-
rectly to standard CMOS SRAM in 8K x 8, 32K x 8, or
128K x 8 densities with no glue logic. Note that this is in
addition to the standard 8051 port 0 and 2 multiplexed
bus. In module form, the Byte–wide bus is already con-
nected directly to on–board SRAM, so the memory ac-
cess becomes transparent and the I/O ports free for ap-
plication use. The extra memory bus also allows for a
time–of–day function to be included, and all Soft Micro-
controller modules are available with built in real–time
clocks. The same clock devices are individually avail-
able when building a system from chips. Battery backup
and decoding are automatically handled by the micro-
processor.
address/data bus that interfaces to memory without in-
terfering with I/O ports. This Byte–wide bus connects di-
rectly to standard CMOS SRAM in 8K x 8, 32K x 8, or
128K x 8 densities with no glue logic. Note that this is in
addition to the standard 8051 port 0 and 2 multiplexed
bus. In module form, the Byte–wide bus is already con-
nected directly to on–board SRAM, so the memory ac-
cess becomes transparent and the I/O ports free for ap-
plication use. The extra memory bus also allows for a
time–of–day function to be included, and all Soft Micro-
controller modules are available with built in real–time
clocks. The same clock devices are individually avail-
able when building a system from chips. Battery backup
and decoding are automatically handled by the micro-
processor.