Panasonic MN103001G/F01K User Manual
I/O Ports
15-64
15.15 Treatment of Unused Pins
Unused pins should be treated as shown in Table 15-15-1 below.
Table 15-15-1 Treatment of Unused Pins
Pin name
Treatment
Set as port and leave open.
Either set as input port and connect to VDD or VSS via individual
resistors (or else use the built-in pull-up resistance by setting the
register appropriately), or set as output port and leave open.
resistors (or else use the built-in pull-up resistance by setting the
register appropriately), or set as output port and leave open.
Leave open.
Set as port and leave open.
Either set as input port and connect to VDD or VSS via individual
resistors, or set as output port and leave open.
Set as port and leave open.
Connect to AVDD or VSS via individual resistors.
Connect to AVDD.
Set as port and leave open.
Either set as input port and connect to VDD or VSS via individual
resistors, or set as output port and leave open.
resistors, or set as output port and leave open.
Connect to VDD via a resistor.
Either set as input port and connect to VDD or VSS via individual
resistors, or set as output port and leave open.
resistors, or set as output port and leave open.
Either set as input port and connect to VDD or VSS via individual
resistors (or else use the built-in pull-up resistance by setting the
register appropriately), or set as output port and leave open.
resistors (or else use the built-in pull-up resistance by setting the
register appropriately), or set as output port and leave open.
Set as port and leave open.
PC3/A19, PC2/A18, PC1/A17, PC0/A16
PB7/ADM15/A15, PB6/ADM14/A14,
PB5/ADM13/A13, PB4/ADM12/A12,
PB3/ADM11/A11, PB2/ADM10/A10,
PB1/ADM9/A9, PB0/ADM8/A8,
PA7/ADM7/A7, PA6/ADM6/A6, PA5/ADM5/A5,
PA4/ADM4/A4, PA3/ADM3/A3, PA2/ADM2/A2,
PA1/ADM1/A1, PA0/ADM0/A0
PB5/ADM13/A13, PB4/ADM12/A12,
PB3/ADM11/A11, PB2/ADM10/A10,
PB1/ADM9/A9, PB0/ADM8/A8,
PA7/ADM7/A7, PA6/ADM6/A6, PA5/ADM5/A5,
PA4/ADM4/A4, PA3/ADM3/A3, PA2/ADM2/A2,
PA1/ADM1/A1, PA0/ADM0/A0
SYSCLK/P97
P96/BR, P95/DK
P55/SBO3/TM5IO/TM13IO,
P54/SBI3/TM4IO/TM12IO,
P53/SBT3/TM3IO/TM11IO,
P52/SBO2/TM2IO, P51/SBI2/TM1IO,
P50/SBT2/TM0IO,
P45/SBO1/DWE, P44/SBI1/DCAS1,
P43/SBT1/DCAS0, P42/SBO0,
P41/SBI0, P40/SBT0,
P30/BG
P54/SBI3/TM4IO/TM12IO,
P53/SBT3/TM3IO/TM11IO,
P52/SBO2/TM2IO, P51/SBI2/TM1IO,
P50/SBT2/TM0IO,
P45/SBO1/DWE, P44/SBI1/DCAS1,
P43/SBT1/DCAS0, P42/SBO0,
P41/SBI0, P40/SBT0,
P30/BG
NMIRQ
P94/WE1, P93/WE0, P92/RE
P83/AN3/IRQ7, P82/AN2/IRQ6, P81/AN1/IRQ5,
P80/AN0/IRQ4
P80/AN0/IRQ4
VREFH
P73/A23/CS3, P72/RAS2/CS2, P71/RAS1/CS1,
P70/CS0
P70/CS0
P63/IRQ3/ADTRG/TM10IOB,
P62/IRQ2/TM10IOA,
P61/IRQ1/TM7IO, P60/IRQ0/TM6IO
P62/IRQ2/TM10IOA,
P61/IRQ1/TM7IO, P60/IRQ0/TM6IO
P02/CAS/A22, P01/A21, P00/A20
P27/D15, P26/D14, P25/D13, P24/D12,
P23/D11, P22/D10, P21/D9, P20/D8,
P17/D7, P16/D6, P15/D5, P14/D4, P13/D3,
P12/D2, P11/RWSEL/D1, P10/AS/D0
P23/D11, P22/D10, P21/D9, P20/D8,
P17/D7, P16/D6, P15/D5, P14/D4, P13/D3,
P12/D2, P11/RWSEL/D1, P10/AS/D0
OSCO