Intel 820E User Manual
Intel
®
820E Chipset
R
Design Guide
15
1.3. System
Overview
The Intel 820E chipset is designed for Intel
®
Pentium
®
III microprocessors and is the first chipset to
support the integrated LAN capability and expanded USB capability. It supports the 4
×
capability of the
AGP 2.0 Interface Specification and it supports the 400 MHz Direct RDRAM* interface. The 400 MHz,
16-bit, double-clocked Direct RDRAM interface provides 1.6-GB/s access to main memory. To provide
more efficient communication between chipset components, the hub interface component interconnect is
designed into the Intel 820E chipset.
16-bit, double-clocked Direct RDRAM interface provides 1.6-GB/s access to main memory. To provide
more efficient communication between chipset components, the hub interface component interconnect is
designed into the Intel 820E chipset.
Support of AGP 4
×
, 400 MHz Direct RDRAM and the hub interface provides a balanced system
architecture for the Pentium III processor, minimizing bottlenecks and increasing system performance. By
increasing memory bandwidth to 1.6 GB/s by means of 400 MHz Direct RDRAM and by increasing the
graphics bandwidth to 1 GB/s by means of AGP 4
increasing memory bandwidth to 1.6 GB/s by means of 400 MHz Direct RDRAM and by increasing the
graphics bandwidth to 1 GB/s by means of AGP 4
×
, the Intel 820E chipset delivers the data throughput
necessary to take advantage of the high performance provided by the powerful Pentium III processors.
In addition, the Intel 820E chipset architecture enables security and manageability infrastructures through
the Firmware Hub (FWH)component.
the Firmware Hub (FWH)component.
The ACPI-compliant Intel 820E chipset platform can support the Full-On, Stop Grant, Suspend to RAM,
Suspend to Disk, and Soft-Off power management states. Through the use of the integrated LAN
functions, the Intel 820E chipset also supports Wake on LAN* for remote administration and
troubleshooting.
Suspend to Disk, and Soft-Off power management states. Through the use of the integrated LAN
functions, the Intel 820E chipset also supports Wake on LAN* for remote administration and
troubleshooting.
The Intel 820E chipset architecture eliminates the need for the ISA expansion bus traditionally integrated
into the I/O subsystem of Intel chipsets. This eliminates many conflicts experienced when installing
hardware and drivers into legacy ISA systems. The elimination of ISA provides true plug and play for the
Intel 820E chipset platform. Traditionally, the ISA interface was used for audio and modem devices. The
addition of AC’97 allows the OEM to use software-configurable AC’97 audio and modem
encoders/decoders (codecs), instead of traditional ISA devices. The 82801BA ICH2 component expands
the support of AC’97 to include up to 6-channel audio. The ISA bus can be implemented with a PCI-to-
ISA bridge from an external component supplier.
into the I/O subsystem of Intel chipsets. This eliminates many conflicts experienced when installing
hardware and drivers into legacy ISA systems. The elimination of ISA provides true plug and play for the
Intel 820E chipset platform. Traditionally, the ISA interface was used for audio and modem devices. The
addition of AC’97 allows the OEM to use software-configurable AC’97 audio and modem
encoders/decoders (codecs), instead of traditional ISA devices. The 82801BA ICH2 component expands
the support of AC’97 to include up to 6-channel audio. The ISA bus can be implemented with a PCI-to-
ISA bridge from an external component supplier.
The Intel 820E chipset contains two core components: the Memory Controller Hub (MCH) and the I/O
Controller Hub 2 (ICH2). The MCH integrates the 133 MHz processor system bus controller, an AGP
2.0 controller, a 400 MHz Direct RDRAM controller, and a high-speed hub interface for communication
with the ICH2. The ICH2 integrates an Ultra ATA/100 controller, two USB host controllers, an LPC
interface controller, an FWH Flash BIOS interface controller, a PCI interface controller, an AC’97
digital controller, an integrated LAN controller, and a hub interface for communication with the MCH.
The Intel 820E chipset provides the data buffering and interface arbitration required to ensure that the
system interfaces operate efficiently and provide the system bandwidth necessary to obtain peak
performance with the Pentium III processor.
Controller Hub 2 (ICH2). The MCH integrates the 133 MHz processor system bus controller, an AGP
2.0 controller, a 400 MHz Direct RDRAM controller, and a high-speed hub interface for communication
with the ICH2. The ICH2 integrates an Ultra ATA/100 controller, two USB host controllers, an LPC
interface controller, an FWH Flash BIOS interface controller, a PCI interface controller, an AC’97
digital controller, an integrated LAN controller, and a hub interface for communication with the MCH.
The Intel 820E chipset provides the data buffering and interface arbitration required to ensure that the
system interfaces operate efficiently and provide the system bandwidth necessary to obtain peak
performance with the Pentium III processor.