Intel 7xx Servers User Manual
C.11 V4R5 Additions
For the V4R5 hardware additions, the tables show each new server model characteristics and its
maximum interactive CPW capacity. For previously existing hardware, the tables show for each server
model the maximum interactive CPW and its corresponding CPU % and the point (the knee of the curve)
where the interactive utilization begins to increasingly impact client/server performance. For the models
that have multiple processors, and the knee of the curve is also given in CPU%, the percent value is the
percent of all the processors (not of a single one).
CPW values may be increased as enhancements are made to the operating system (e.g. each feature of the
Model 53S for V3R7 and V4R1). The server model behavior is fixed to the original CPW values.
For example, the model 53S-2157 had V3R7 CPWs of 509.9/30.7 and V4R1 CPWs 650.0/32.2. When
using the 53S with V4R1, this means the knee of the curve is 2.6% CPU and the maximum interactive is
7.7% CPU, the same as it was in V3R7.
maximum interactive CPW capacity. For previously existing hardware, the tables show for each server
model the maximum interactive CPW and its corresponding CPU % and the point (the knee of the curve)
where the interactive utilization begins to increasingly impact client/server performance. For the models
that have multiple processors, and the knee of the curve is also given in CPU%, the percent value is the
percent of all the processors (not of a single one).
CPW values may be increased as enhancements are made to the operating system (e.g. each feature of the
Model 53S for V3R7 and V4R1). The server model behavior is fixed to the original CPW values.
For example, the model 53S-2157 had V3R7 CPWs of 509.9/30.7 and V4R1 CPWs 650.0/32.2. When
using the 53S with V4R1, this means the knee of the curve is 2.6% CPU and the maximum interactive is
7.7% CPU, the same as it was in V3R7.
The 2xx, 8xx and SBx models are new in V4R5. See the chapter, AS/400 RISC Server Model
Performance Behavior, for a description of the performance highlights of these new models.
Performance Behavior, for a description of the performance highlights of these new models.
C.11.1 AS/400e Model 8xx Servers
240
4200
4
4 MB
540
830-2402 (1533)
120
4200
4
4 MB
540
830-2402 (1532)
70
4200
4
4 MB
540
830-2402 (1531)
1050
1850
2
2 MB
400
830-2400 (1535)
560
1850
2
2 MB
400
830-2400 (1534)
240
1850
2
2 MB
400
830-2400 (1533)
120
1850
2
2 MB
400
830-2400 (1532)
70
1850
2
2 MB
400
830-2400 (1531)
2000
3200
4
4 MB
500
820-2398 (1527)
1050
3200
4
4 MB
500
820-2398 (1526)
560
3200
4
4 MB
500
820-2398 (1525)
240
3200
4
4 MB
500
820-2398 (1524)
120
3200
4
4 MB
500
820-2398 (1523)
70
3200
4
4 MB
500
820-2398 (1522)
35
3200
4
4 MB
500
820-2398 (1521)
1050
2000
2
4 MB
500
820-2397 (1526)
560
2000
2
4 MB
500
820-2397 (1525)
240
2000
2
4 MB
500
820-2397 (1524)
120
2000
2
4 MB
500
820-2397 (1523)
70
2000
2
4 MB
500
820-2397 (1522)
35
2000
2
4 MB
500
820-2397 (1521)
560
950
1
2 MB
450
820-2396 (1525)
240
950
1
2 MB
450
820-2396 (1524)
120
950
1
2 MB
450
820-2396 (1523)
70
950
1
2 MB
450
820-2396 (1522)
35
950
1
2 MB
450
820-2396 (1521)
240
370
1
n/a
400
820-2395 (1524)
120
370
1
n/a
400
820-2395 (1523)
70
370
1
n/a
400
820-2395 (1522)
35
370
1
n/a
400
820-2395 (1521)
Interactive CPW
Processor CPW
CPUs
L2 cache
per CPU
Chip Speed
MHz
Model
Table C.11.1 Model 8xx Servers (all new Condor models)
IBM i 6.1 Performance Capabilities Reference - January/April/October 2008
©
Copyright IBM Corp. 2008
Appendix C CPW, CIW and MCU for System i Platform
359