SMSC LAN9311 User Manual
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
187
Revision 1.4 (08-19-08)
DATASHEET
14.2.2.6
Host MAC RX Dropped Frames Counter Register (RX_DROP)
This register indicates the number of receive frames that have been dropped by the Host MAC.
Offset:
0A0h
Size:
32 bits
BITS
DESCRIPTION
TYPE
DEFAULT
31:0
RX Dropped Frame Counter (RX_DFC)
This counter is incremented every time a receive frame is dropped by the
Host MAC. RX_DFC is cleared on any read of this register.
This counter is incremented every time a receive frame is dropped by the
Host MAC. RX_DFC is cleared on any read of this register.
Note:
The interrupt RXDFH_INT (bit 23 of the
) can be issued when this counter passes through its
halfway point (7FFFFFFFh to 80000000h).
RC
00000000h