SMSC LAN9311 User Manual

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

SMSC LAN9311/LAN9311i

219

Revision 1.4 (08-19-08)

 

This read/write register combined with 

 form the 64-bit 1588 Clock Target Reload value. The 1588

Clock Target Reload is the value that is reloaded to the 1588 Clock Compare value when a clock
compare event occurs and the 

 bit of the 

 is set. Refer to 

 for

additional information.

Both this register and the 

 must be written for either to be affected.

Offset:

184h

Size:

32 bits

31:0

Clock Target Reload High (CLOCK_TARGET_RELOAD_HI)
This field contains the high 32-bits of the 64-bit 1588 Clock Target Reload 
value that is reloaded to the 1588 Clock Compare value.

R/W

00000000h