SMSC LAN9311 User Manual
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
341
Revision 1.4 (08-19-08)
DATASHEET
14.5.2.18
Port x MAC Receive Alignment Error Count Register (MAC_RX_ALIGN_CNT_x)
This register provides a counter of received packets with 64 bytes to the maximum allowable, and a
FCS error. The counter is cleared upon being read.
FCS error. The counter is cleared upon being read.
Note:
For this counter, a packet with the maximum number of bytes that is not an integral number of
bytes (e.g. a 1518 1/2 byte packet) and a FCS error is considered an alignment error and is
counted.
bytes (e.g. a 1518 1/2 byte packet) and a FCS error is considered an alignment error and is
counted.
Register #:
Port0: 041Fh
Size:
32 bits
Port1: 081Fh
Port2: 0C1Fh
Port2: 0C1Fh
BITS
DESCRIPTION
TYPE
DEFAULT
31:0
RX Alignment
Count of packets that have between 64 bytes and the maximum allowable
number of bytes and are not byte aligned and have a bad FCS. The max
number of bytes is 1518 for untagged packets and 1522 for tagged packets.
If Jumbo2K (bit 3) is set in the
Count of packets that have between 64 bytes and the maximum allowable
number of bytes and are not byte aligned and have a bad FCS. The max
number of bytes is 1518 for untagged packets and 1522 for tagged packets.
If Jumbo2K (bit 3) is set in the
, the max number of bytes is 2048.
Note:
This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 481 hours.
Minimum rollover time at 100Mbps is approximately 481 hours.
RC
00000000h