SMSC LAN9311 User Manual

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Revision 1.4 (08-19-08)

366

SMSC LAN9311/LAN9311i

 

This register contains the Port x interrupt mask. Port x related interrupts in the 

 may be masked via this register. An interrupt is masked by setting the

corresponding bit of this register. Clearing a bit will unmask the interrupt. Refer to 

 for more information.

There are no possible Port x interrupt conditions available. This register exists for future use,
and should be configured as indicated for future compatibility.

Register #:

Port0: 0480h

Size:

32 bits

Port1: 0880h
Port2: 0C80h

31:8

RO

-

7:0

These bits must be written as 11h

R/W

11h