SMSC LAN9311 User Manual
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
447
Revision 1.4 (08-19-08)
DATASHEET
15.5.3
Power-On Configuration Strap Valid Timing
This diagram illustrates the configuration strap valid timing requirements in relation to power-on. In
order for valid configuration strap values to be read at power-on, the following timing requirements
must be met.
order for valid configuration strap values to be read at power-on, the following timing requirements
must be met.
Note:
Configuration straps must only be pulled high or low. Configuration straps must not be driven
as inputs.
as inputs.
Note:
Device configuration straps are also latched as a result of nRST assertion. Refer to
for additional details.
Figure 15.3 Power-On Configuration Strap Latching Timing
Table 15.7 Power-On Configuration Strap Latching Timing Values
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
t
cfg
Configuration strap valid time
15
mS
VDD33IO
Configuration Straps
t
cfg
2.0V