SMSC LAN9311 User Manual

Page of 460
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
69
Revision 1.4 (08-19-08)
DATASHEET
 
6.4.3.1
Port Default Priority
As detailed in 
, the default priority is based on the ingress ports priority bits in its port VID
value. The PVID table is read and written by using the 
. Refer to 
 through 
 for detailed VLAN register descriptions.
6.4.3.2
IP Precedence Based Priority
The transmit priority queue can be chosen based on the Precedence bits of the IPv4 TOS octet. This
is supported for tagged and non-tagged packets for both type field and length field encapsulations. The
Precedence bits are the three most significant bits of the IPv4 TOS octet.
6.4.3.3
DIFFSERV Based Priority
The transmit priority queue can be chosen based on the DIFFSERV usage of the IPv4 TOS or IPv6
Traffic Class octet. This is supported for tagged and non-tagged packets for both type field and length
field encapsulations.
The DIFFSERV table is used to determine the packet priority from the 6-bit Differentiated Services (DS)
field. The DS field is defined as the six most significant bits of the IPv4 TOS octet or the IPv6 Traffic
Class octet and is used as an index into the DIFFSERV table. The output of the DIFFSERV table is
then used as the priority. This priority is then passed through the Traffic Class table to select the
transmit priority queue.
Note: The DIFFSERV table is not initialized upon reset or power-up. If DIFFSERV is enabled, then
the full table must be initialized by the host.
The DIFFSERV table is read and written by using the 
, and 
 for detailed DIFFSERV register descriptions.
6.4.3.4
VLAN Priority
As detailed in 
, the transmit priority queue can be taken from the priority field of the VLAN
tag. The VLAN priority is sent through a per port Priority Regeneration table, which is used to map the
VLAN priority into a user defined priority. 
The Priority Regeneration table is programmed by using the 
, and 
. Refer to
 through 
 for detailed descriptions of
these registers.