SMSC LAN9311 User Manual

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Revision 1.4 (08-19-08)

82

SMSC LAN9311/LAN9311i

 

The LAN9311/LAN9311i contains three PHYs: Port 1 PHY, Port 2 PHY and a Virtual PHY. The Port 1
& 2 PHYs are identical in functionality and each connect their corresponding Ethernet signal pins to
the switch fabric MAC of their respective port. These PHYs interface with their respective MAC via an
internal MII interface. The Virtual PHY provides the virtual functionality of a PHY and allows connection
of the Host MAC to port 0 of the switch fabric as if it was connected to a single port PHY. All PHYs
comply with the IEEE 802.3 Physical Layer for Twisted Pair Ethernet and can be configured for full/half
duplex 100 Mbps (100BASE-TX) or 10Mbps (10BASE-T) Ethernet operation. All PHY registers follow
the IEEE 802.3 (clause 22.2.4) specified MII management register set and can be configured indirectly
via the Host MAC, or directly via the memory mapped Virtual PHY registers. Refer to 

 for details on the Ethernet PHY registers.

The LAN9311/LAN9311i Ethernet PHYs are discussed in detail in the following sections:

„

„

Each individual PHY is assigned a unique default PHY address via the phy_addr_sel_strap
configuration strap as shown in 

. In addition, the Port 1 PHY and Port 2 PHY addresses can

be changed via the 

 field in the 

. For proper operation, all LAN9311/LAN9311i PHY addresses must be

unique. No check is performed to assure each PHY is set to a different address. Configuration strap
values are latched upon the de-assertion of a chip-level reset as described in 

0

0

1

2

1

1

2

3