Siemens ERTEC200 User Manual
10.2 Detailed Memory Description
The table below presents a detailed description of the memory segments. Mirrored segments should not be used for
addressing to ensure compatible memory expansion at a later date.
addressing to ensure compatible memory expansion at a later date.
Segment
Contents
Größe
Adressbereich
Beschreibung
0
Boot-ROM (0-8kB)
or
EMIF-SDRAM (0-128MB)
or
EMIF-Memory(0-64MB)
or
Locked I-Cache
(2/4/6kB)
or
EMIF-SDRAM (0-128MB)
or
EMIF-Memory(0-64MB)
or
Locked I-Cache
(2/4/6kB)
256 MB
0000_0000 -
0FFF_FFFF
After Reset:
Boot-ROM (8kB physical.;
memory swap=00b);
After memory swap:
EMIF-SDRAM (128MB physical.;
memory swap=01b); or
EMIF memory (64MB physical.;
memory swap=10b);
From ARM9 perspective, the locked I-
cache (2/4/6 Kbytes) or a D-TCM (4
Kbytes) can be displayed.
Boot-ROM (8kB physical.;
memory swap=00b);
After memory swap:
EMIF-SDRAM (128MB physical.;
memory swap=01b); or
EMIF memory (64MB physical.;
memory swap=10b);
From ARM9 perspective, the locked I-
cache (2/4/6 Kbytes) or a D-TCM (4
Kbytes) can be displayed.
Note2
1
IRT switch
256 MB
1000_0000 -
1FFF_FFFF
2 MB physical;
- 0-1MB for IRT-Register
- 1-2MB for KRAM (64 kByte)
- 0-1MB for IRT-Register
- 1-2MB for KRAM (64 kByte)
Note1
2
EMIF (SDRAM)
256 MB
2000_0000 -
2FFF_FFFF
128 MByte
When a smaller memory area is used,
mirroring over the entire area
3
EMIF
IO Bank 0
IO Bank 0
16 MB
3000_0000 -
30FF_FFFF
When a smaller device is interfaced, mirroring
over the entire 16 Mbytes
over the entire 16 Mbytes
EMIF
IO Bank 1
IO Bank 1
16 MB
3100_0000 -
31FF_FFFF
When a smaller device is interfaced, mirroring
over the entire 16 Mbytes
over the entire 16 Mbytes
EMIF
IO Bank 2
IO Bank 2
16 MB
3200_0000 -
32FF_FFFF
When a smaller device is interfaced, mirroring
over the entire 16 Mbytes
over the entire 16 Mbytes
EMIF
IO Bank 3
IO Bank 3
16 MB
3300_0000 -
33FF_FFFF
When a smaller device is interfaced, mirroring
over the entire 16 Mbytes
over the entire 16 Mbytes
Not used
3400_0000 -
3FFF_FFFF
4
Internal boot ROM
8 kB
4000_0000-
4000_1FFF
8 kByte physical
Timer 0 - 2
256 Byte
4000_2000 -
4000_20FF
32 Byte physical
Note2
Note2
Watchdog
256 Byte
4000_2100 -
4000_21FF
28 Byte physical
Note2
Note2
SPI
256 Byte
4000_2200 -
4000_22FF
256 Byte physical
UART
256 Byte
4000_2300 -
4000_23FF
256 Byte physical
Reserved
256 Byte
4000_2400 -
4000_24FF
256 Byte physical
GPIO
256 Byte
4000_2500 -
4000_25FF
32 Byte physical
Note2
Note2
System control register
block
block
256 Byte
4000_2600 -
4000_26FF
164 Byte physical
System control register block ERTEC 200
Note2
System control register block ERTEC 200
Note2
F counter
256 Byte
4000_2700 -
4000_27FF
8 Byte physical
Note2
Note2
Reserviert
4000_2800-
4FFF_FFFF
Copyright © Siemens AG 2007. All rights reserved.
92
ERTEC 200 Manual
Technical data subject to change Version 1.1.0