Fujitsu CM71-00101-5E User Manual
173
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.77
STH (Store Half-word Data in Register to Memory)
Stores the half-word data in "Ri" to memory address "(R13 + Rj)".
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STH (Store Half-word Data in Register to Memory)
Assembler format:
STH Ri, @(R13, Rj)
Operation:
Ri
→
( R13 + Rj)
Flag change:
N, Z, V, and C: Unchanged
Execution cycles:
a cycle(s)
Instruction format:
Example:
STH R3, @(R13, R2)
N
Z
V
C
–
–
–
–
MSB
LSB
0
0
0
1
0
0
0
1
Rj
Ri
R2
1234567A
0 0 0 0
0 0 0 4
0 0 0 0
4 3 2 1
R2
R3
R3
0 0 0 0
4 3 2 1
4 3 2 1
0 0 0 0
0 0 0 4
1234567A
1234567C
1234567C
1 2 3 4
5 6 7 8
R13
R13
1 2 3 4
5 6 7 8
x x x x
Memory
Memory
Before execution
After execution
Instruction bit pattern : 0001 0001 0010 0011