Fujitsu CM71-00101-5E User Manual
267
APPENDIX A Instruction Lists
Table A.2-5 Multiply/Divide Instructions (10 Instructions)
Mnemonic
Format
OP
CYC
FLAG
NZVC
Operation
Remarks
MUL Rj,Ri
MULU Rj,Ri
MULH Rj,Ri
MULUH Rj,Ri
MULU Rj,Ri
MULH Rj,Ri
MULUH Rj,Ri
A
A
A
A
A
A
A
AF
AB
BF
BB
5
5
3
3
5
3
3
CCC –
CCC –
CCC –
CC – –
CC – –
CC – –
Rj × Ri
→ MDH,MDL
Rj × Ri
→ MDH,MDL
Rj × Ri
→ MDL
Rj × Ri
→ MDL
32bits × 32bits=64bits
Unsigned
16bits × 16bits=32bits
Unsigned
Unsigned
16bits × 16bits=32bits
Unsigned
DIV0S Ri
DIV0U Ri
DIV1 Ri
DIV2 Ri
DIV3
DIV4S
DIV0U Ri
DIV1 Ri
DIV2 Ri
DIV3
DIV4S
E
E
E
E
E
E
E
E
E
E
E
97-4
97-5
97-6
97-7
9F-6
9F-7
97-5
97-6
97-7
9F-6
9F-7
1
1
d
1
1
1
1
d
1
1
1
– – – –
– – – –
– – – –
– C– C
– C– C
– C– C
– – – –
– – – –
– – – –
Step operation
32bits/32bits=32bits
32bits/32bits=32bits
Table A.2-6 Shift Instructions (9 Instructions)
Mnemonic
Format
OP
CYC
FLAG
NZVC
Operation
Remarks
LSL Rj, Ri
LSL #u4, Ri
LSL2 #u4, Ri
LSL #u4, Ri
LSL2 #u4, Ri
A
C
C
C
B6
B4
B5
B4
B5
1
1
1
1
1
CC – C
CC – C
CC – C
CC – C
CC – C
Ri << Rj
→ Ri
Ri << u4
→ Ri
Ri <<{u4+16}
→ Ri
Logical shift
LSR Rj, Ri
LSR #u4, Ri
LSR2 #u4, Ri
LSR #u4, Ri
LSR2 #u4, Ri
A
C
C
C
B2
B0
B1
B0
B1
1
1
1
1
1
CC – C
CC – C
CC – C
CC – C
CC – C
Ri >> Rj
→ Ri
Ri >> u4
→ Ri
Ri >>{u4+16}
→ Ri
Logical shift
ASR Rj, Ri
ASR #u4, Ri
ASR2 #u4, Ri
ASR #u4, Ri
ASR2 #u4, Ri
A
C
C
C
BA
B8
B9
B9
1
1
1
1
1
CC – C
CC – C
CC – C
CC – C
CC – C
Ri >> Rj
→ Ri
Ri >> u4
→ Ri
Ri >>{u4+16}
→ Ri
Arithmetic shift
Table A.2-7 Immediate Data Transfer Instructions (Immediate Transfer Instructions for Immediate Value
Set or 16-bit or 32-bit Values) (3 Instructions)
Mnemonic
Format
OP
CYC
FLAG
NZVC
Operation
Remarks
LDI:32 #i32, Ri
LDI:20 #i20, Ri
LDI:8 #i8, Ri
LDI:20 #i20, Ri
LDI:8 #i8, Ri
E
C
B
C
B
9F-8
9B
C0
C0
3
2
1
2
1
– – – –
– – – –
– – – –
– – – –
– – – –
i32
→ Ri
i20
→ Ri
i8
→ Ri
Higher 12 bits are zeros
Higher 24 bits are zeros
Higher 24 bits are zeros