Fujitsu CM71-00101-5E User Manual
279
INDEX
Bit Patterns
Relation between Bit Patterns "Ri" and "Rj" and
Register Values
BORH
BORH (Or 4-bit Immediate Data to Higher 4 Bits of
Byte Data in Memory)
BORL
BORL (Or 4-bit Immediate Data to Lower 4 Bits of
Byte Data in Memory)
Branch Relative
Bcc (Branch Relative if Condition Satisfied)
Bcc:D (Branch Relative if Condition Satisfied)
BTSTH
BTSTH (Test Higher 4 Bits of Byte Data in Memory)
BTSTL
BTSTL (Test Lower 4 Bits of Byte Data in Memory)
Bypassing
Register Bypassing
Byte Order
Bit Order and Byte Order
C
CALL
CALL (Call Subroutine)
CALL:D (Call Subroutine)
Carry Bit
ADDC (Add Word Data of Source Register and Carry
Bit to Destination Register)
SUBC (Subtract Word Data in Source Register and
Carry Bit from Destination Register)
CCR
Condition Code Register (CCR: Bit 07 to bit 00)
CMP
CMP (Compare Immediate Data of Source Register
and Destination Register)
CMP (Compare Word Data in Source Register and
Destination Register)
CMP2 (Compare Immediate Data and Destination
Register)
Compare Immediate Data
CMP (Compare Immediate Data of Source Register
and Destination Register)
CMP2 (Compare Immediate Data and Destination
Register)
Compare Word Data
CMP (Compare Word Data in Source Register and
Destination Register)
Condition Code Register
Condition Code Register (CCR: Bit 07 to bit 00)
COPLD
COPLD (Load 32-bit Data from Register to
Coprocessor Register)
COPOP
COPOP (Coprocessor Operation)
Coprocessor
"PC" Values Saved for Coprocessor Error Traps
"PC" Values Saved for Coprocessor Not Present Traps
Conditions for Generation of Coprocessor Error Traps
Conditions for Generation of Coprocessor Not Found
Traps
COPLD (Load 32-bit Data from Register to
Coprocessor Register)
COPOP (Coprocessor Operation)
Coprocessor Error Trap Operation
Coprocessor Not Found Trap Operation
COPST (Store 32-bit Data from Coprocessor Register
to Register)
COPSV (Save 32-bit Data from Coprocessor Register
to Register)
Overview of Coprocessor Error Traps
Overview of Coprocessor Not Found Traps
Results of Coprocessor Operations after a Coprocessor
Error Trap
Saving and Restoring Coprocessor Error Information
COPST
COPST (Store 32-bit Data from Coprocessor Register
to Register)
General-purpose Registers during Execution of
"COPST/COPSV" Instructions
COPSV
COPSV (Save 32-bit Data from Coprocessor Register
to Register)
General-purpose Registers during Execution of
"COPST/COPSV" Instructions
CPU
Features of the FR Family CPU Core
Initialization of CPU Internal Register Values at Reset
Sample Configuration of the FR Family CPU
D
Dedicated Registers
Delay Slots
Instructions Prohibited in Delay Slots
Undefined Instructions Placed in Delay Slots
Delayed Branching Instructions
Examples of Processing Delayed Branching
Instructions