Lenovo Pentium III 25P2836 Leaflet
Product codes
25P2836
Pentium
®
III Processors for
Applied Computing
product brief
Pentium
®
III Processor Product Highlights
■
Available in 600, 700 and 850 MHz for a
100 MHz processor side bus
■
Available in 733, 866 MHz, and 1 GHz for a
133 MHz processor side bus
■
Validated with Intel
®
840, 815, 815E, 810 and
440BX Chipsets
■
Available in 1.26 GHz for a 133 MHz
processor side bus
■
Validated with Intel
®
815E Chipset and
Chipsets from third-party-vendors
■
Manufactured on state-of-the-art .13µ process
technology
■
512 KB Advanced transfer cache-on-die,
full-speed Level 2 (L2) cache with Error
Correcting Code (ECC)
Correcting Code (ECC)
■
16 KB instruction, 16 KB data non-blocking,
Level 1 (L1) cache
■
P6 Dynamic execution microarchitecture
including multiple branch prediction, data
flow analysis and speculative execution
flow analysis and speculative execution
■
Streaming SIMD extensions, consisting of
70 new instructions that enable advanced
imaging, 3D, streaming audio and video, and
speech recognition
imaging, 3D, streaming audio and video, and
speech recognition
■
Intel
®
MMX
™
media enhancement technology
■
Dual Independent Bus (DIB) architecture:
separate dedicated external processor side bus
and dedicated internal high-speed cache bus
and dedicated internal high-speed cache bus
■
Memory is cacheable for 64 Gbytes of
addressable memory space
■
Both dual-processor (with third-party chipsets)
and uni-processor capable
■
Data integrity and reliability features such as
Error Correcting Code, Fault Analysis and
Recovery for both system and L2 cache buses
Recovery for both system and L2 cache buses
■
Fully compatible with existing Intel
®
Architecture-based software
■
Flip-Chip Pin Grid Array 2 (same as for
FC-PGA with an Integrated Heat Spreader)
■
Embedded life cycle support
Pentium
®
III Processor with 512K Cache
Product Highlights
■
Manufactured on .18µ process technology
■
256 KB Advanced transfer cache-on-die,
full-speed Level 2 (L2) cache with Error
Correcting Code (ECC)
Correcting Code (ECC)
■
16 KB instruction, 16 KB data non-blocking,
Level 1 (L1) cache
■
P6 Dynamic execution microarchitecture
including multiple branch prediction, data
flow analysis and speculative execution
flow analysis and speculative execution
■
Streaming SIMD extensions, consisting of
70 new instructions that enable advanced
imaging, 3D, streaming audio and video, and
speech recognition
imaging, 3D, streaming audio and video, and
speech recognition
■
Intel MMX
™
media enhancement technology
■
Dual Independent Bus (DIB) architecture:
separate dedicated external processor side bus
and dedicated internal high-speed cache bus
and dedicated internal high-speed cache bus
■
Memory is cacheable for 64 Gbytes of
addressable memory space
■
Both dual-processor (with the 840 Chipset
only) and uni-processor capable
■
Data integrity and reliability features such as
Error Correcting Code, Fault Analysis and
Recovery for both system and L2 cache buses
Recovery for both system and L2 cache buses
■
Fully compatible with existing Intel
®
Architecture-based software
■
Flip-Chip Pin Grid Array (PGA370)
packaging
■
Embedded life cycle support