Intel 253668-032US User Manual
Vol. 3 1-7
ABOUT THIS MANUAL
means the bytes of a word are numbered starting from the least significant byte.
Figure 1-1 illustrates these conventions.
Figure 1-1 illustrates these conventions.
1.3.2
Reserved Bits and Software Compatibility
In many register and memory layout descriptions, certain bits are marked as
reserved. When bits are marked as reserved, it is essential for compatibility with
future processors that software treat these bits as having a future, though unknown,
effect. The behavior of reserved bits should be regarded as not only undefined, but
unpredictable. Software should follow these guidelines in dealing with reserved bits:
reserved. When bits are marked as reserved, it is essential for compatibility with
future processors that software treat these bits as having a future, though unknown,
effect. The behavior of reserved bits should be regarded as not only undefined, but
unpredictable. Software should follow these guidelines in dealing with reserved bits:
•
Do not depend on the states of any reserved bits when testing the values of
registers which contain such bits. Mask out the reserved bits before testing.
registers which contain such bits. Mask out the reserved bits before testing.
•
Do not depend on the states of any reserved bits when storing to memory or to a
register.
register.
•
Do not depend on the ability to retain information written into any reserved bits.
•
When loading a register, always load the reserved bits with the values indicated
in the documentation, if any, or reload them with values previously read from the
same register.
in the documentation, if any, or reload them with values previously read from the
same register.
NOTE
Avoid any software dependence upon the state of reserved bits in
Intel 64 and IA-32 registers. Depending upon the values of reserved
register bits will make software dependent upon the unspecified
manner in which the processor handles these bits. Programs that
depend upon reserved values risk incompatibility with future
processors.
Intel 64 and IA-32 registers. Depending upon the values of reserved
register bits will make software dependent upon the unspecified
manner in which the processor handles these bits. Programs that
depend upon reserved values risk incompatibility with future
processors.
Figure 1-1. Bit and Byte Order
Byte 3
Highest
Data Structure
Byte 1
Byte 2
Byte 0
31
24 23
16 15
8 7
0
Address
Lowest
Bit offset
28
24
20
16
12
20
16
12
8
4
0
Address
Byte Offset