Intel 253668-032US User Manual
17-24 Vol. 3
8086 EMULATION
5. Upon returning to virtual-8086 mode, the processor continues execution of the
8086 program.
When the 8086 program is ready to receive maskable hardware interrupts, it
executes the STI instruction to set the VIF flag (enabling maskable hardware
interrupts). Prior to setting the VIF flag, the processor automatically checks the VIP
flag and does one of the following, depending on the state of the flag:
executes the STI instruction to set the VIF flag (enabling maskable hardware
interrupts). Prior to setting the VIF flag, the processor automatically checks the VIP
flag and does one of the following, depending on the state of the flag:
•
If the VIP flag is clear (indicating no pending interrupts), the processor sets the
VIF flag.
VIF flag.
•
If the VIP flag is set (indicating a pending interrupt), the processor generates a
general-protection exception (#GP).
general-protection exception (#GP).
The recommended action of the protected-mode general-protection exception
handler is to then call the virtual-8086 monitor and let it handle the pending inter-
rupt. After handling the pending interrupt, the typical action of the virtual-8086
monitor is to clear the VIP flag and set the VIF flag in the EFLAGS image on the stack,
and then execute a return to the virtual-8086 mode. The next time the processor
receives a maskable hardware interrupt, it will then handle it as described in steps 1
through 5 earlier in this section.
If the processor finds that both the VIF and VIP flags are set at the beginning of an
instruction, it generates a general-protection exception. This action allows the
virtual-8086 monitor to handle the pending interrupt for the virtual-8086 mode task
for which the VIF flag is enabled. Note that this situation can only occur immediately
following execution of a POPF or IRET instruction or upon entering a virtual-8086
mode task through a task switch.
Note that the states of the VIF and VIP flags are not modified in real-address mode or
during transitions between real-address and protected modes.
handler is to then call the virtual-8086 monitor and let it handle the pending inter-
rupt. After handling the pending interrupt, the typical action of the virtual-8086
monitor is to clear the VIP flag and set the VIF flag in the EFLAGS image on the stack,
and then execute a return to the virtual-8086 mode. The next time the processor
receives a maskable hardware interrupt, it will then handle it as described in steps 1
through 5 earlier in this section.
If the processor finds that both the VIF and VIP flags are set at the beginning of an
instruction, it generates a general-protection exception. This action allows the
virtual-8086 monitor to handle the pending interrupt for the virtual-8086 mode task
for which the VIF flag is enabled. Note that this situation can only occur immediately
following execution of a POPF or IRET instruction or upon entering a virtual-8086
mode task through a task switch.
Note that the states of the VIF and VIP flags are not modified in real-address mode or
during transitions between real-address and protected modes.
NOTE
The virtual interrupt mechanism described in this section is also
available for use in protected mode, see Section 17.4, “Protected-
Mode Virtual Interrupts”.
available for use in protected mode, see Section 17.4, “Protected-
Mode Virtual Interrupts”.
17.3.3
Class 3—Software Interrupt Handling in Virtual-8086 Mode
When the processor receives a software interrupt (an interrupt generated with the
INT n instruction) while in virtual-8086 mode, it can use any of six different methods
to handle the interrupt. The method selected depends on the settings of the VME flag
in control register CR4, the IOPL field in the EFLAGS register, and the software inter-
rupt redirection bit map in the TSS. Table 17-2 lists the six methods of handling soft-
ware interrupts in virtual-8086 mode and the respective settings of the VME flag,
IOPL field, and the bits in the interrupt redirection bit map for each method. The table
also summarizes the various actions the processor takes for each method.
The VME flag enables the virtual mode extensions for the Pentium and later IA-32
processors. When this flag is clear, the processor responds to interrupts and excep-
INT n instruction) while in virtual-8086 mode, it can use any of six different methods
to handle the interrupt. The method selected depends on the settings of the VME flag
in control register CR4, the IOPL field in the EFLAGS register, and the software inter-
rupt redirection bit map in the TSS. Table 17-2 lists the six methods of handling soft-
ware interrupts in virtual-8086 mode and the respective settings of the VME flag,
IOPL field, and the bits in the interrupt redirection bit map for each method. The table
also summarizes the various actions the processor takes for each method.
The VME flag enables the virtual mode extensions for the Pentium and later IA-32
processors. When this flag is clear, the processor responds to interrupts and excep-