Intel Pentium Mobile T2130 LF80539GE0361M Data Sheet
Product codes
LF80539GE0361M
Datasheet
7
Introduction
1
Introduction
The Intel® Pentium® dual-core mobile processor is built on Intel’s 65-nanometer
process technology. This document provides specifications for the Pentium dual-core
mobile processor.
Note:
All instances of “processor” in this document refer to the Pentium dual-core mobile
processor with 1-MB L2 cache and 533-MHz Front Side Bus (FSB), unless specified
otherwise.
The following list provides some of the key features on this processor:
• Dual-core processor
• Supports Intel® Architecture with Dynamic Execution
• On-die, primary 32-KB instruction cache and 32-KB write-back data cache
• On-die, 1-MB second level cache with Advanced Transfer Cache Architecture
• Data prefetch logic
• Streaming SIMD Extensions 2 (SSE2) and Streaming SIMD Extensions 3 (SSE3)
• 533-MHz FSB
• Enhanced Intel SpeedStep® Technology
• Digital Thermal Sensor
• Processor is offered in only Micro-FCPGA packages
• Execute Disable Bit support for enhanced security
• Supports Intel® Architecture with Dynamic Execution
• On-die, primary 32-KB instruction cache and 32-KB write-back data cache
• On-die, 1-MB second level cache with Advanced Transfer Cache Architecture
• Data prefetch logic
• Streaming SIMD Extensions 2 (SSE2) and Streaming SIMD Extensions 3 (SSE3)
• 533-MHz FSB
• Enhanced Intel SpeedStep® Technology
• Digital Thermal Sensor
• Processor is offered in only Micro-FCPGA packages
• Execute Disable Bit support for enhanced security
1.1
Terminology
Term
Definition
#
A “#” symbol after a signal name refers to an active low signal, indicating a
signal is in the active state when driven to a low level. For example, when
RESET# is low, a reset has been requested. Conversely, when NMI is high,
a nonmaskable interrupt has occurred. In the case of signals where the
name does not imply an active state but describes part of a binary
sequence (such as address or data), the “#” symbol implies that the signal
is inverted. For example, D[3:0] = “HLHL” refers to a hex ‘A’, and D[3:0]#
= “LHLH” also refers to a hex “A” (H= High logic level, L= Low logic level).
XXXX means that the specification or value is yet to be determined.
signal is in the active state when driven to a low level. For example, when
RESET# is low, a reset has been requested. Conversely, when NMI is high,
a nonmaskable interrupt has occurred. In the case of signals where the
name does not imply an active state but describes part of a binary
sequence (such as address or data), the “#” symbol implies that the signal
is inverted. For example, D[3:0] = “HLHL” refers to a hex ‘A’, and D[3:0]#
= “LHLH” also refers to a hex “A” (H= High logic level, L= Low logic level).
XXXX means that the specification or value is yet to be determined.
Front Side Bus
(FSB)
(FSB)
Refers to the interface between the processor and system core logic (also
known as the chipset components).
known as the chipset components).
AGTL+
Advanced Gunning Transceiver Logic. Used to refer to Assisted GTL+
signaling technology on some Intel processors.