Intel Pentium M 770 RH80536GE0462M Data Sheet

Datasheet

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processor deasserts its BR0# pin. The On Die Termination on the processor FSB buffers 

is disabled when the signals are driven low, resulting in additional power savings. The 

low I/O termination voltage is on a dedicated voltage plane independent of the core 

voltage, enabling low I/O switching power at all times. 

The processor incorporates the PSI# signal that is asserted when the processor is in a 

reduced power consumption state. PSI# can be used to improve intermediate and light 

load efficiency of the voltage regulator, resulting in platform power savings and 

extended battery life. The algorithm that the processor uses for determining when to 

assert PSI# is different from the algorithm used in previous Intel® Pentium® M 

processors.

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